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I'm designing a interface PCB with I/O modules using ethernet. It is my first PCB with high speed communication, which is giving me a lot of worries.

In the modules documentation it says that the LVDS differential impedance shall be 100ohm, but no tolerance. It also recommend that they are routed between two ground planes.
modules documentation

I have read design guides and rules: PCB Layout for the Ethernet PHY Interface AND Board Design Guidelines for LVDS Systems

My PCB stacking design looks like this:

  • 18um copper
  • 0.36mm FR-4 STD
  • 35um copper
  • 0.71 FR-4 STD
  • 35um copper
  • 0.36mm FR-4 STD
  • 18um copper

Questions

  1. I'm routing on the second copper layer, which makes the distance to the upper and under GND layer different is that a bad idea?

  2. The guides says spacing under 0.25mm between the differential pair with a width of 0.25mm trace. when i use Saturn PCB design to match the differential impedance to 100ohms i get 0.6mm spacing with a trace width of 0.254mm. This is more than the to times trace width which is recommended (also read as close as possibly). Should i make the trace width smaller or change something else?

  3. I read that the maximum trace length should be 50mm(TIA/EIA-644 LVDS), which is not er problem. But what about the length differences tolerance ?

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  • \$\begingroup\$ puh, these are really five big questions in one question. I'd recommend breaking things down into single questions. Question 3 is a good starting point – it's the most basic question. \$\endgroup\$ – Marcus Müller Jul 24 '17 at 18:10
  • \$\begingroup\$ Where exactly does it recommend to route LVDS between ground planes? Differential pairs have inherently low emi signatures. \$\endgroup\$ – Erik Friesen Jul 24 '17 at 19:05
  • \$\begingroup\$ @ErikFriesen Routing it between ground layers makes the impedance more stable and less susceptible to fluctuation due to the external environment, such as metal enclosures, wires, and cables. \$\endgroup\$ – DerStrom8 Jul 24 '17 at 19:15
  • \$\begingroup\$ @ErikFriesen i meant it as: recommended in the documentation from the modules manufacturer. \$\endgroup\$ – Andersta Jul 24 '17 at 19:55
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1) Three layer boards are incredibly uncommon and difficult to manufacture, and will cost you a lot more. Make a four-layer board instead. That being said, asymmetrical ground plane distances is not a problem, but will affect impedance. Use the Saturn PCB Toolkit to get your required trace widths and dielectric thicknesses. That tool has an asymmetric edge coupled microstrip impedance calculator built in.

2) The exact distance between the two conductors in a pair isn't as critical as you might think, provided they are well away from other conductors and polygons that are not part of the differential pair. Design to make sure the tracks are as close together as possible and meet impedance requirements.

3) Trace lengths between separate LVDS pairs are most important when your receivers are very time-dependent (i.e. you need to make sure all of your data reaches the receiver before the clock triggers. Otherwise you could lose data). Actual length requirements depend greatly on the transmitters and receivers you're using, as well as the frequency of the transmitted signals. When it comes to the conductors within a single pair it becomes much more critical. How critical depends, once again, on the frequency of the transmitted signals and how good your receivers are at detecting transitions.

4) Without providing us with your design it is impossible for us to critique it.

5) Right The First Time by Lee Ritchey is one of the best books I have ever found for designing for high-speed signals. It has a LOT of in-depth descriptions, explanations, tips, tricks, etc that are immensely useful. I cannot recommend this book enough.

While I have done some high-speed design I am by no means an expert, so I am open to corrections and additions to this post.

Marcus is right, though, each one of these questions could be given its own post and you'll get more in-depth answers that way.

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  • \$\begingroup\$ thank you very much for your answer. 1. I made a mistake describing the layers, it is a four layer :). 2. okay thanks 3. the manufacturer of the modules dont give any information about transmitter or receiver, but the frequency should be 100MHz. if were is 2% difference between the length is that a problem? 5. Nice i will definitely look at that book! \$\endgroup\$ – Andersta Jul 24 '17 at 19:47
  • \$\begingroup\$ At 100MHz a lot of factors will come into play and it's nearly impossible to predict whether a 2% length difference will have a significant negative impact or not. Again, this highly depends on your exact drivers and receivers, among many other things. My instinct tells me 2% might be too much, and I probably wouldn't go above 0.2%. You really just need to design it as best you can with lengths as precise as physically possible and then monitor the eye diagram on the finished board on a scope. Also make sure you aren't losing data. That's really your best bet \$\endgroup\$ – DerStrom8 Jul 24 '17 at 20:53
  • \$\begingroup\$ you are right, to design it as precise as possibly must be the right way to go. Thanks again for you help. \$\endgroup\$ – Andersta Jul 25 '17 at 3:46
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    \$\begingroup\$ Thank you for the book recommendation! For anyone else looking for the book, the author published it for free: thehighspeeddesignbook.com \$\endgroup\$ – ahalekelly Oct 1 '18 at 21:28
  • \$\begingroup\$ @ahalekelly Awesome, I had no idea! Thanks for sharing! \$\endgroup\$ – DerStrom8 Oct 2 '18 at 1:08

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