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I have designed a non-inverting gain configuration using LT6200CS8-10. I have set a gain of 64 V/V. This is the schematic design:

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This is the snapshot of the PCB layout:

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Without any signal the output should be set at a DC level of 0.77V, I observe that but I notice on the oscilloscope that the output is quite noisy.

Channel 1 is the opamp output

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Could you suggest how I can reduce this noise?

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    \$\begingroup\$ What does vdc5v0 look like? What's on the other side of that PCB? \$\endgroup\$
    – rdtsc
    Commented Jul 25, 2017 at 23:29
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    \$\begingroup\$ Have you tried turning off the lamps and covering your PCB with aluminum foil or some other metal thing? In other words, a faraday cage. And what do you see when you probe the ground clip? Same noise? \$\endgroup\$ Commented Jul 25, 2017 at 23:32
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    \$\begingroup\$ Use much faster scope sweep to check if it is oscillation or noise. \$\endgroup\$
    – bobflux
    Commented Jul 25, 2017 at 23:37
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    \$\begingroup\$ Try probing the ground pin of the opamp - the noise should go away completely. Sometimes the noise is not coming from where we expect it. \$\endgroup\$ Commented Jul 25, 2017 at 23:48
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    \$\begingroup\$ @ScottSeidman, the output is not shorted, R37 is not populated (clearly stated in the schematics), apparently it is a bypass option, amplifier, or no amplifier. \$\endgroup\$ Commented Jul 26, 2017 at 7:59

2 Answers 2

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It looks pretty normal to me. The LT6200-10 is a 1.6GHz amplifier. The noise is specified at about 1 nV/sqrt(Hz). Sqrt of 1.6 GHz is 40,000. Therefore, at gain 1 the output will have 40 uV of wideband noise. Your gain is 64, which makes the noise at 2.5 mV p-p. The scope shows 500 uV p-p, which is pretty close to the theory, given that actual bandwidth is likely limited by board/pads parasitics.

ADDITION: here is the AC plot for basic LT6200-10 in OP's configuration, LT6200 The bandwidth is about 30MHz, not counting for board parasitics. With 1 pF it goes a bit down. With 15pF the bandwidth goes to 1 MHz, so the noise goes down as well.

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  • \$\begingroup\$ The output is bandlimited by the RC in the feedback loop \$\endgroup\$ Commented Jul 26, 2017 at 0:41
  • \$\begingroup\$ @ScottSeidman, yep, the 1 pF feedback will probably cut the bandwidth to 150 MHz, which will cut the noise by a factor of 5. \$\endgroup\$ Commented Jul 26, 2017 at 0:50
  • \$\begingroup\$ I get 1/(2piRC)=8MHz \$\endgroup\$ Commented Jul 26, 2017 at 0:51
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    \$\begingroup\$ Also, we don't know if the input is open circuit, or connected to a low-Z source (sig generator) with its output off. If open circuit, there's another 9.53K noise source (R17) or about 15nV/rtHz on the input. \$\endgroup\$
    – user16324
    Commented Jul 26, 2017 at 11:32
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    \$\begingroup\$ @BrianDrummond, you are quite right. Re-calculating: the OPA itself, with gain of 64 and 30MHz bandwidth, makes about 300 uV RMS (at 1nV/rtHz). The rest (200 uV) must be coming from input. Back calculating (daycounter.com/Calculators/Thermal-Noise-Calculator.phtml ), I am arriving to under 50 Ohms, or just as a typical sig generator. Looks like all ends meet now. Thanks. \$\endgroup\$ Commented Jul 26, 2017 at 16:17
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This isn't about the noise, but...

Layout check: the opamp's negative supply VDD (pin 4) is connected to GND by the same via (and a shared bit of trace which should be about 4mm) as the GND connection to C41.

So we have about 5nH shared impedance between the opamp's VDD and its IN+ pin.

When the opamp sources current into the load, the current flowing from its VDD pin will change. When it slews fast, current flowing through its internal compensation cap, which is connected to GND, will also change.

If the output stage exits class A and goes into class B due to load current, the GND pin current will be a very distorted replica of the output.

This current goes through the 5nH layout inductance, is turned into a voltage, and is reinjected into the "+" input.

Depending on the load, frequency, etc, this may simply increase distortion, mess up settling time, or cause oscillation.

Here, we are lucky that LT included an rough supply current model for this opamp, which allows to simulate this. This is not usually the case, often all you get is a constant supply current equal to the opamp's idle current, and it pulls its output current from a voltage source hidden inside the model. But this one seems to be almost OK. Not totally accurate, by looking at the waveforms, but at least the current varies according to what goes into the load!

Mean loads, like the one on the sim below, create oscillation. Easier loads (like 50 ohms) will merely have increased distortion.

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So, don't use shared traces and vias for this... it's a really bad idea. I'm pretty sure you'll have surprises when you measure THD on your prototype.

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    \$\begingroup\$ +1, totally agree with this analysis, reality might have a surprise. \$\endgroup\$ Commented Jul 26, 2017 at 17:48
  • \$\begingroup\$ @peufeu the opamp output drives a comparator input using AC coupling cap, do you think this parasitic inductance is causing this oscillation at the output? \$\endgroup\$
    – Ash
    Commented Jul 26, 2017 at 20:39
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    \$\begingroup\$ To be honest, I have no idea. That's the problem with layout mistakes, it's hard to understand what happens. Most likely, if you ran the output through a spectrum analyzer, you would find a noise peak somewhere due to the shared ground impedance. \$\endgroup\$
    – bobflux
    Commented Jul 26, 2017 at 21:49

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