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For the research purpose I am interested are there FPGA chips that are capable to update the bytestream (the programmable logic) from the bytestream itself?

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  • \$\begingroup\$ FPGA bitstreams are loaded from the on-board serial ROM. No one is restricting you from making such a board which will allow the FPGA to reprogram the ROM. \$\endgroup\$
    – Eugene Sh.
    Jul 26, 2017 at 13:59
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    \$\begingroup\$ The keyword is "partial reconfiguration". Note that unless you're using one of the reverse-engineered Lattice Semi chips, the bitstream is proprietary - you could swap it for a different one, but you can't built the bitstream yourself. \$\endgroup\$
    – pjc50
    Jul 26, 2017 at 14:01
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    \$\begingroup\$ And become sentient ? \$\endgroup\$
    – Grabul
    Jul 26, 2017 at 19:31

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If​ I understand what you're looking for, the feature is called "partial reconfiguration", and all of the major FPGA vendors support it on at least some of their chip families.

Go to your favorite vendor's website and search for that phrase.

Also, most chip families support reading and writing their own configuration PROM from user logic, so "total reconfiguration" is also an option, although this involves an interruption in operation in order to reboot the chip.

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On some FPGAs, you can configure a LUT to be updatable. For instance, the Xilinx Spartan-6 supports a "CFGLUT5" primitive, which behaves like a LUT5 with a shift register which updates the contents of the LUT.

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    \$\begingroup\$ But that's only part of the story. In the general case, you also need to be able to reconfigure the interconnection fabric. \$\endgroup\$
    – Dave Tweed
    Jul 26, 2017 at 18:40
  • \$\begingroup\$ @DaveTweed Indeed. Not all parts support partial reconfiguration, though -- for instance, the Spartan-6 does not -- so configurable LUTs are the only option available. \$\endgroup\$
    – user39382
    Jul 26, 2017 at 18:46

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