For the research purpose I am interested are there FPGA chips that are capable to update the bytestream (the programmable logic) from the bytestream itself?
If I understand what you're looking for, the feature is called "partial reconfiguration", and all of the major FPGA vendors support it on at least some of their chip families.
Go to your favorite vendor's website and search for that phrase.
Also, most chip families support reading and writing their own configuration PROM from user logic, so "total reconfiguration" is also an option, although this involves an interruption in operation in order to reboot the chip.
On some FPGAs, you can configure a LUT to be updatable. For instance, the Xilinx Spartan-6 supports a "CFGLUT5" primitive, which behaves like a LUT5 with a shift register which updates the contents of the LUT.