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So I keep seeing that people use LEDs and a limiting resistor in series on tx and rx lines to create status leds.

My question is, wouldn't this cause a voltage drop on the expected input voltage into the chip? If I'm feeding a 3v3 logic line and throw a resistor and an LED in front of it, wouldn't the voltage to the chip be too low to drive it high? But I keep seeing this solution everywhere. Am I misunderstanding something? My knowledge of electronics is iffy at best.

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  • \$\begingroup\$ Please link some examples where you see this. I haven't seen it on any serious design. I have seen it done once for a wonky level conversion. Something like changing 6-V logic to 4-V logic. \$\endgroup\$ – The Photon Jul 27 '17 at 14:21
  • \$\begingroup\$ "I'm feeding a 3v3 logic line and throw a resistor and an LED in front of it, ...". This isn't what we'd call a good technical description. There's an easy-to-use schematic editor built in to the editor. \$\endgroup\$ – Transistor Jul 27 '17 at 16:15
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Today the LED industry has developed many devices called "ultra-bright LEDs". These devices produce well-sufficient light even if 0.5 mA is applied, since you don't want to lit the entire room for indication purposes. A 3-5-10 kOhm resistor appears to be sufficient, which doesn't load much any modern CMOS output pin.

For example, the green LED made by Lite-on, p/n LTST-C193TGKT-5A, rated at 2.8V and 153 mcd, produces too much light even with 5.6k resistor when connected to a 3.3V signal. So, with modern LED technology, the status display technique under this question is well working. You just need to select the right LED for the job.

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I think this is the answer to your question, in your question you state "series" but I think you mean parallel. In Example 1 I hope is it obvious that 1V is across R1. In Example 2 I added a resistor and and LED in parallel, in this example too there is 1V across R3.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ In theory (or when oversimplifying) you are correct. But practical CMOS output stages don't look like that. There must be series resistance. \$\endgroup\$ – Mike Jul 27 '17 at 20:16

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