I have a component that has a very large array signal in it (a couple kilobits) and I currently write and read to it in only one component. I have checked in Vivado if this uses too much resources, and it doesn't. My question is I want to have a sub-component that can access this array (only read from it). If I merely set the array as an input to the sub-component, will it take any more resources that if I implemented the array in the same component? I know the optimizing compiler is pretty powerful, but I don't know what goes on when you interface between VHDL components.