# Interfacing an LVDS driver with an LVPECL receiver

I'm trying to understand how the below circuit allows interfacing LVDS levels with LVPECL levels.

Assuming:

Driver:

Voh = 1.4V, Vol = 1V, Vcm = 1.2V

VBB = 2V

After the transmission line, the AC coupling caps remove the DC common mode of the driver so that Voh = 0.2V and Vol = -0.2V, correct? I assume VBB sets the common mode of the receiver at 2V, so does that mean the inputs to the receiver are:

Vih = 2 + 0.2V and Vil = 2 - 0.2V?

And also is the bypass capacitor on VBB absolutely necessary?

Thanks

Vih = 2 + 0.2V and Vil = 2 - 0.2V?

yes but only if signal protocol is symmetrical, ie. biphase etc, with no DC content

And also is the bypass capacitor on VBB absolutely necessary?

yes to avoid Vbb shift with lowest frequency.

After the transmission line, the AC coupling caps remove the DC common mode of the driver so that Voh = 0.2V and Vol = -0.2V, correct? I assume VBB sets the common mode of the receiver at 2V, so does that mean the inputs to the receiver are: Vih = 2 + 0.2V and Vil = 2 - 0.2V?

Nope. The inputs swing 0.2 volts around VBB, not ground, since that is what they are referenced to. And since VCC is the midpoint of the input swings, this allows the receiver to properly receive the AC component of the inputs.

And also is the bypass capacitor on VBB absolutely necessary?

Yup.

With the cap, VBB is established without being (much) affected by the signal swings of the inputs. If the input signal could be guaranteed to have 50% duty cycle you could take a chance on leaving the cap out, but even then you'd be asking for trouble.