# Inverter VOH VOL

Does inverter VOL and VOH depend on output load?

I wast trying to solve the below interesting problem.

I think the output will be simply 3v if I consider VOH won't change even under loading. Because here extra 100 ohm resistance is added with same voltage 3volts.So the current through the extra 100ohm will be zero and output will stay at 3volts.

I want to to know whether inverter VOH and VOL depend on output load.

Of course they do. The output impedance of the inverter and the load impedance form a voltage divider that will move the output voltage towards the other rail. This is why datasheets specify the output voltage with one or more known loads/currents.

• So my assumption that VOH will stay at 3V is wrong. Can you just clarify this. My VOH is 3v and I am connecting a resistance 100ohm witt 3 volt in other end. Will it still be at VOH? Aug 1, 2017 at 18:25
• The exercise wants you to calculate what the output impedance of the inverter is. Once you have that you can do the rest of the calculations to figure out what the positive rail and output voltage are. Aug 1, 2017 at 18:28
• But for an inverter the output impedance will change as per input. It will be either Rpullup or Rpulldown. Aug 1, 2017 at 18:29
• It is not strange for both Zoh and Zol to be equal for modern CMOS devices. Aug 1, 2017 at 18:32
• In (iii) only Rpullup is needed. Is it necessary to calculate Rpulldown? Aug 1, 2017 at 18:32

If you read datasheet carefully, All the necessary conditions are given to define the effective RdsOn of the CMOS or TTL or Op Amp output impedance or any driver for that matter.

Voh,Vol {@Iol,Ioh @Vdd @T['C]}

Thus Zol= Vol/Iol and Zoh= (Vdd-Voh)/Ioh

For simplicity I call this ESR and it has a nominal and Max or worst case value or tolerance then once you know total Load current of Vdd/(Zo + Load Ω ) or use resistance divider Ohm's Law you can easily estimate Vo for any load. THe Zo tolerance is normal to be +/-25% at a given supply, Vdd for all OEM chips then a tolerance for Vdd and temperature.

Zod rises with lower Vdd and visa versa.... except that 74ALCxxx chips rated for 3.3V are designed to be 25 Ω and 74HCxxx chips are designed @5V to be 50 Ω (nom) and more than double this Zo @3.3V .

They never specify this but it is implicit by the Vol/Iol ratio for given conditions.

This question tests your skills and experience on understanding logic Specifications with Analog skills.

It may occur to you that this is consistent with properties of all MOSFETs where the Vgs threshold must affect Zo and is dependant on Vdd.

If you already know that CMOS is made from 2 complementary FETs each with RdsOn @ Vgs , where the turn on threshold Vgs(th) must be around <=1/3 of Vgs to give good results. e.g. Vgs(th)<=1.5 for 5V logic and <=1V for 3.3V logic

The same applies to input threshold , gain ΔVo/ΔVi and rise time which is current limited for a given capacitance load.

If you understood all this, then the question is trivial. If you didn't all you needed to know was Zo was 100 Ohms in series (internal)

I used to ask these kinds of interview questions to separate the expert from the intermediates to the newbies in 1 question depending on their depth of response, for analog skills in logic.