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this is probably a simple one for anyone with some electronics design experience (which I do not have). Can anyone tell me how to build a simple circuit which generates a square wave but has every nth pulse suppressed? So, to put some (example) numbers to it, the wave form could be described as such: Three 1 µs-wide positive pulses at 5 ms intervals (i.e. 200 Hz) every 20 ms. So, this example indicates that every 4th pulse should be suppressed.
Thanks much in advance!
It can be done with parallel input / serial output shift registers and clock. I your case a clock of 1 MHz (1us) and 20ms/1us = 20000 states (flip flops), that's a very big circuit. Nowadays you have the possibility to use FPGA or MCU. The FPGA would perform with exact timing, while the MCU would have some jitter.
Other possible circuit could be using clock 200Hz 555 (circuit), shift register, and pulse shaping circuit, another 555 circuit that makes a pulse of 1us at transition from 0->1 at its input. So, you have a circuit that generates 5ms pulses and you use this NE555 circuit to limit the pulse duration to only 1us. Alternatively the pulse shaping could be done also with a capacitor and two AND gates.
