# Do AC coupled inputs suppress voltage offsets in an op amp?

Background: I'm trying to build an AC coupled pre-amplifier that doesn't succumb to voltage offsets and input bias currents. The input signal has noise ~10 nV level, and I want a factor of a million in gain.

After studying the art of electronics, I'm trying to wrap my head around what are the problems input offset voltage can do, and how it can be circumvented.

Question: Will the following circuit need not worry about the V+ voltage offsets since it's AC coupled anyways?

My reasoning is that the 500k resistor lets the signal float on whatever voltage offset is there, i.e., there is no need to worry about error at 0V input.

The Circuit:

• Offset voltage and current are an artifact of the construction of the amp. Aug 2, 2017 at 1:26

Your circuit will amplify the offset voltage by 100,000.

The 500K resistor adds an offset of Ib * 400K for zero offset current. The bias current is typically 1.2nA so it will contribute a temperature-sensitive 48V of output offset typically.

Note that 10nV of RMS noise is not achievable with this part. Also, if you want gain of 1,000,000 your bandwidth will be < 1Hz.

• Hi, I know it's been a moment but how are you getting the 100,000 gain for the offset? Isn't the circuit set up to produce a 1M gain?
– Big6
Feb 18, 2021 at 2:27
• @Big6 To see the DC gain, consider C2 open. So R3 has no effect on the gain and there is a feedback that is 1$\Omega$ & 100K$\Omega$, so the gain is +100,000 (or +100,001 if you want to be pedantic, but the resistors are far less accurate than would justify that). Feb 18, 2021 at 4:04
• Oh yeah -- I had not paid close attention to that. Thanks!
– Big6
Feb 18, 2021 at 4:40

If you want a gain of a million, use 3 consecutive AC coupled amps with a gain of 100 each.

Also note from the data sheet figure 18, that even with zero input resistance, you'll get an input noise of 10 nV RMS with a bandwidth of 1 Hz. You have not specified your desired signal bandwidth, but I'm guessing that this will not meet your needs.

The R8/R9 divider limits the circuit's ability to correct (null out) DC offsets; one volt output becomes 10 microVolts at the Vin(-) pin.

Here is a topology from Signal Chain Explorer, using 2 opamp stages. I set the Vsensor (Vin) voltage to 1 microVoltspp. Result is ENOB of 6 bits (38dB SNR). The first opamp is opa211, chosen for its 50_ohm Rnoise; the accompanying gain-set network uses 10 Ohms to GND, to ensure the OpAmps' low noise is not wasted. Between first gain and 2nd gain is a DC blocker (100uF and 10Kohm) and a LPF to cut down on the high frequency random noise. The 2nd opamp is generic; pick some opamp that implements autozero upon power up, if you want very low DC output.

Bias currents are at the op amp input terminals, not the circuit input. Your 500K resistor is the only DC path for bias current at the positive input. Multiply the bias current by 500K, and then by the gain of the circuit, and that is what you expect to see as offset at the output.

To get a DC gain equal to one, you would have to insert a(nother) capacitor between R9 and ground. Thus the T-network would be galvanically isolated from ground.

You also need R1 = R3 + R8 to minimize the impact of the op-amp input currents.

• That's a breath of fresh air, someone who actually understands the effect of input offset voltage and input bias currents!
– user173271
Feb 24, 2021 at 17:49
• @James, How nice that "... more co-operation and less competition!" in your profile page sounds... This is what SE EE needs most... Feb 24, 2021 at 18:06