I am currently tring to route a SoC to two DDR3 chips.
Length matching is required for the signals SoC->DDRA and SoC->DDRB. Altium is able to measure a nets length by building the sum of all trace-object's lengths that are part of a net. But this doesnt help me, as the signal lanes will split up and partly be routed to just DDRA or just DDRB.
Does Altium allow to measure the length of a trace between two pads?
If not, I'll add net ties and split up all the signals but I'd hate this approach, as the schematic gets really messy + I got netTie components all over the PCB.
Altium Version is Winter 09.