Attached is the layout I am working on. enter image description here

Please see the yellow circled area. It is a common net. I have kept it as separate trace in the layout for each pin. Is there any advantage by providing shape at the pins instead individual trace. I am considering this as a generic question though this chip is a transistor array used to drive relay circuitry.

  • \$\begingroup\$ What do you mean by 'shape at the pins'? \$\endgroup\$ – Bruce Abbott Aug 3 '17 at 6:58
  • \$\begingroup\$ @BruceAbbott, Adding copper covering both the pins with same net. \$\endgroup\$ – vt673 Aug 3 '17 at 7:05

Depends on the kind of circuit you have. You said it is a transistor array.

If these transistors just commutate low-current signals, then you better leave it as is – with thin traces connecting adjacent pins. This will make it easier to hand solder because less copper is less thermal mass.

If this transistor array commutates (relatively) high currents, as in H-bridge motor controller (or relay controller, as you said it is), then you want to have as much copper as possible there, to lower the trace resistance. In this case, connect the pins with traces as you did, then draw a polygon with the same Net name, covering both pins and an outgoing trace.


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