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This question already has an answer here:

I have a microprocessor with two lines, /RESET and /HALT, which are independently pulled to +5V DC. To reset the processor, both of these lines must be grounded for at least 100 ms -- they may not be wired together and treated as one line. How do I create a circuit such that, when a single DPDT reset button (debounced) is pressed, both of these independent lines are grounded, and when it is released, they stay grounded for at least 100 ms?

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marked as duplicate by Olin Lathrop, Eugene Sh., Brian Drummond, ThreePhaseEel, Voltage Spike Aug 4 '17 at 4:15

This question has been asked before and already has an answer. If those answers do not fully address your question, please ask a new question.

  • \$\begingroup\$ How is this different from your previous question? electronics.stackexchange.com/questions/322127/… \$\endgroup\$ – Jashaszun Aug 3 '17 at 20:45
  • \$\begingroup\$ (1) And why do you need a delay? (2) Why are you using a double-throw button? (3) How are the inputs debounced if they halt the micro? \$\endgroup\$ – Transistor Aug 3 '17 at 20:52
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This kind of problems are usually addressed by a specialty circuit called "voltage monitor", or "voltage supervisor". Check distributors for ICs like MIC803, APX809, MAX809, etc.

These are 3-pin devices, and no need for any de-bouncing.

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Build a pair of these mosfet circuit for 2 of the pins, connect both mosfet gate together. Time delay depends on C1 and R3.

schematic

simulate this circuit – Schematic created using CircuitLab

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    \$\begingroup\$ The basic idea could work, but I think you want NMOS not PMOS. Also, the specific part you chose is really not suitable. A small signal MOSFET such as the BSS138 is more than adequate. Note that the OP said it is a 5V system, so you may want to change VCC to 5V. \$\endgroup\$ – mkeith Aug 4 '17 at 3:00

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