In Vivado, implementation of my projects can take a while especially if I use debug cores. What can I do to make implementation faster? I tried the "RuntimeOptimized" constraint and it made no difference. Is there an option for less optimization and faster compilation? If I debug nets as "data" only and not "data and trigger" will it make it faster?
Often I am changing small things in order to debug my firmware. I feel like this is the wrong way to do it, but I'm not sure what else to do when I get results different from those I simulated (I use ActiveHDL to simulate).
Is there a way to reduce implementation time if I made only minor changes?
Is it possible to improve my VHDL code to make things faster?
Thanks for any help.