# Question about PCB layer stackup

I made multi layer with Altium PCB board wizard. I assigned two signal plane on each surface(top and bottom layer) and two internal plane(power and ground). On layer stack manager, there is no dielectric on interface of Top Layer - Power plane and Power Plane - Ground Plane(As you can see in the image) This makes me a little bit confused. Is dielectric unnecessary between those planes? If so, why?

Somehow you have gotten things mucked up. There definitely should be a dielectric layer between every two adjacent copper layers.

However, if you can't figure out how to fix it, it's of little consequence. Altium doesn't manufacture your board, your fab shop does. And your fab shop doesn't need any design data to describe the dielectric layers. They just need to be told how thick the layers should be and what material to use for them.

You can easily draw the stack-up drawing manually into your fabrication drawing layer, and your fab shop should have no difficulty following it. In the past it was even common to give the stack up information in a separate text file rather than in a drawing layer in gerber format.

For example, the drawing can be as simple as this:

------------  Top Layer -- 0.5 oz copper
============  FR-4 0.6 mm
------------  Plane layer 1 -- 1 oz copper
============  FR-4 0.4 mm
------------  Plane layer 2 -- 1 oz copper
============  FR-4 0.6 mm
------------  Bottom Layer -- 0.5 oz copper


Of course, if you like you could specify which layers are cores and which pre-pregs, designate a specific laminate product instead of simply "FR-4", etc., depending on the needs of your design.

• You mean it is okay if I inform PCB manufacturer in advance although It does not exist on software? Thanks – 김현일 Aug 8 '17 at 4:02
• @김현일, the stack-up information is not part of the data sent to the fab shop unless you add it to one of the drawing layers or include it in a separate file. – The Photon Aug 8 '17 at 4:54
• Isn't it more common to have 1oz copper on the outside layers and 0.5oz on the inner layers? – Araho Aug 8 '17 at 6:36
• Stack-up is not part of Gerber data. It will be included in ODB exports per standard. Most fabs ask for Gerber, but some want ODB as well, so beware-there. – Asmyldof Aug 8 '17 at 8:01

add a 0.4mm FR4 dielectric between power ground layers.

If your supplier can handle thinner dielectric layers by controlling the dielectric thickness with a smooth surface finish <<0.1mm then a thinner dielectric acts as a bigger capacitance (and low ESR) for better distributed decoupling. This technology has been around for a few decades but I just remembered it and some are still keen on using it.

Here is a std flex cct between two rigid boards.

• Just added dielectric thanks to you. Have a nice day! – 김현일 Aug 8 '17 at 4:06

I don't recall using a Stackup Wizard in Altium (it may not have had one when I last used it 10 years ago).

When I ordered a multi-layer board, I just specified the order of the copper layers, and trusted the board shop to put appropriate insluation in as needed. I provided a "readme" text file with this and other necessary information with the Gerber and drill files.

If you are dealing with controlled-impedance tracks, or other special requirements, you may have to discuss your requirements with the board shop, as well as describing them in a "readme.txt" file.

• I gotta add dielectric layer in software design as well as inform my PCB manufacturer of my layer stack information – 김현일 Aug 8 '17 at 4:08

Apart from being necessary (in practice) I guess software tools and measurements could be compromised if layer stack-up was wrong. I would suggest you try to add those dielectric layers again !

• Thank you I just found how to add dielectric layer. Moreover, I'd better draw up a documentation regarding layer stack information. – 김현일 Aug 8 '17 at 4:05