I want identify JTAG pinout on the target board, using the JTAGenum tool. I have read the JTAGenum code, and want to clarify a few point about user configuration. JTAGenum can identify 4 mandatory pins (TCK,TMS,TDI,TDO), is there method to define the optional pins? (TRST, RST, RTCK)

Can anyone clarify about user configuration part in JTAGenum code: it's required to define the pins[] and pinnames[], and map of pin names to pins to scan with. Would it be correct to specify settings for 8 pin JTAG header (one pin from which is GND) as follow:

byte      pins[] = { 2, 3, 4, 5, 6, 7, 8 };
char * pinnames[] = { "TCK ", "TMS ", "TDI ", "TDO ", "DIG_6", "DIG_7", "DIG_8" };
  • \$\begingroup\$ The 4 signals being identified are the only mandatory pins. TRST (active low) is optional so some parts have it, others do not. Generally speaking, it is missing on FPGAs. \$\endgroup\$ Aug 10, 2017 at 17:19

2 Answers 2


You can probably ignore the 'optional' pins except for RTCK, there should be no debug scenario where these pins are necessary unless your part has the JTAG port disabled by being tied-off in a 'reset' state. If the target does implement these optional pins, the PCB is as likely to hard-wire them as to expose them on a connector. If you have a connector identified as a candidate JTAG port, it may also provide a 3v3 reference (target supply rail) which it is expecting your probe to use (and can likely also be ignored).

RTCK may be present on an old Arm target, anything ARM11 and earlier. This is a sampled and delayed version of the TCK input, re-synchronised to the internal core clock. If RTCK is in use, you need to run your JTAG slow, or wait for the RTCK edges. Anything using the CoreSight DAP won't use RTCK (it could conceivably be wired as a loopback of TCK, but serves no purpose).

Bear in mind that 2-pin Serial-Wire debug ports are now common, you'll need a different sequence to detect these (of the order of 100 bits per pin which is tested as data). There is no simple FSM in this case like in JTAG.

I noticed that the current Open-OCD documentation suggests that JTAG clock speed is limited to ~CPU/6. This is only true for the older ARM cores where the RTAG TAP interfaces directly to the processor. Any processor with a CoreSight DAP has the debug clock completely asynchronous to the internal clocks, and can even run with JTAG/SW clock faster than the processor.

See here for the standard connectors - you might also find a supply, a target voltage reference and a target functional reset - but this will depend on the designer's plan for debug of the board.

  • \$\begingroup\$ Regarding the 'RST' pin: if a device have a 'Reset' button somewhere, that allow reset device to factory default: does this means that 'RST' signal also presents among the optional JTAG pins? \$\endgroup\$
    – minto
    Oct 28, 2017 at 12:06
  • \$\begingroup\$ Maybe. nRESET on the standard debug connector pinouts allows for this, so there is encouragement to do this, but no functional requirement - so it depends on your board designer. \$\endgroup\$ Oct 28, 2017 at 17:30
  • \$\begingroup\$ Can it be the case that VCC pin isn't included in JTAG header? I have measured voltage on all JTAG pins but can't find VCC voltage. The VCC applied from another point on the PCB? Not clear why VCC pin wasn't just added within JTAG test points. \$\endgroup\$
    – minto
    Jan 8, 2018 at 0:08
  • \$\begingroup\$ Vtref is optional, as is a supply which the adaptor can use. \$\endgroup\$ Jan 8, 2018 at 16:28

I'm just learning, but as far as I understood, first thing is you need the pinout of your own arduino. For example in my case I have arduino nano.

enter image description here

As you can see, there are numbers in purple, which you can use. As much pins you have available in your arduino, more pins can you test in your target board at the same time.

So you can write a code like this:

byte      pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 11, 12, 13, 14, 15, 16, 17, 18, 19 };

char * pinnames[] = { "DIG_0 ", "DIG_1 ", "DIG_2", "DIG_3", "DIG_4", "DIG_5", "DIG_6", "DIG_7", "DIG_8", "DIG_9", "DIG_10", "DIG_11", "DIG_12", "DIG_13", "DIG_14", "DIG_15", "DIG_16", "DIG_17", "DIG_18", "DIG_19" };

However, there is a problem with this. The number of combinations is huge and probably in the target you have an idea about which one 6 pins can be the JTAG interface.

So you can simplify using the minimun number:

byte      pins[] = { 0, 1, 2, 3, 4, 5};

char * pinnames[] = { "DIG_0 ", "DIG_1 ", "DIG_2", "DIG_3", "DIG_4", "DIG_5" };

In both cases you need to plug all the pins registered in the arduino to any of the suspected pins in target (in first cases, maybe some of the 20 pins are empty).

Then you need to connect to serial port to the JTAGEnum program and after scanning (command s) you should get the results of the tests (if any).

If you found a JTAG, the program will will tell you which pins in your arduino match with the identified JTAG pins.

For example:

FOUND! tck:DIG_0 tms:DIG_1 tdo:DIG_2 tdi:DIG_3

So you can follow the DIG_0 to know which one is tck in the target, ...

I'm sorry if I dont explain very well myself and I hope this can help


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