I am trying to calculate a two-fingered, both on the same layer, capacitor. I have run into a few papers on it but they are taking a ground plane on the other side of the PCB into consideration and they seem to be showing a meandered capacitor like this one

enter image description here

which is not exactly what I was looking for. I am after a simpler design: enter image description here

I know that the capacitance formula is enter image description here where A = t * L; t being the thickness of the copper pour and L being the length on which the two traces juxtapose, thus forming the plates of our capacitor. Should I apply it as such (no ground plane beneath) ? Am I also right to be using these values ?

  • epsilon_r = 1 for air
  • t = 35 microns for 1 oz copper
  • 3
    \$\begingroup\$ \$\epsilon_R\$ is 1 for air, but some of the field will be in the PCB material rather than in air. \$\endgroup\$
    – The Photon
    Aug 11, 2017 at 22:35
  • \$\begingroup\$ @ThePhoton I was afraid taht would be the case :S \$\endgroup\$
    – kellogs
    Aug 11, 2017 at 22:35
  • 1
    \$\begingroup\$ I found one formula for calculating Er in a coplanar waveguide. You could try using that. The formula is kind of involved. You can find it in this PDF: jlab.org/accel/eecad/pdf/050rfdesign.pdf. Make sure you use the formula for the ungrounded coplanar waveguide. \$\endgroup\$
    – user57037
    Aug 12, 2017 at 0:58
  • 1
    \$\begingroup\$ Also don't forget about solder-mask. Either remove it or account for its Er of 3 to 5 (depending on the material, there's also outliers of 2 and 7 for speciality purposes) \$\endgroup\$
    – Asmyldof
    Aug 12, 2017 at 2:50
  • 1
    \$\begingroup\$ Yeah, I am not following the terminology. But from a later example, it appears that the effective Er is around 2.44 or 2.45. Maybe just try working out your problem using that, and see how it goes? \$\endgroup\$
    – user57037
    Aug 12, 2017 at 19:49


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