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I have created a copper track which runs around the signal pin from an SMA connector (as shown in the image).

The problem I seem to encounter now is that from the polygon fill, the copper pour overlaps the via completely (but is shown in a light red color). Is this allowed or will it cover the hole?

I would like the copper from the via (green part) to connect with the copper from the track so that I can solder directly onto the track at the base without a 'bridge' of solder.

I attempted to put a tRestrict circle around the via, but the DRC spits out an error. Alternatively, ticking Thermals runs thin copper through the centre of the hole, so am not convinced about that option either.

One other thing - is it okay if the ground plane on the bottom runs to the edges of the board (with no spacing)?

Regards, Billy.

Images of my problem:

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1 Answer 1

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The problem I seem to encounter now is that from the polygon fill, the copper pour overlaps the via completely (but is shown in a light red color). Is this allowed or will it cover the hole?

No, it will not cover the hole. Assuming that you want to connect the 'via' with your polygon pour, you don't require to put anything on tRestrict.

One other thing - is it okay if the ground plane on the bottom runs to the edges of the board (with no spacing)?

Well! you ideally should leave some space from the edges, how much space is your decision to make.

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