Why should we buffer reset line?

Question

Today I saw the schematic of a lenovo G480-la-7981p (download or download). On page 6 you can see this part:

In the green box you can see a buffered Reset line. My questions are:

Why they've used a buffer? To filter noise?
If so, then why a buffer? why not a simple capacitor?(e.g. 100nf) or an LC filter?
What's the usage of resistors R32 and R34?
I'm still diging whole of the schematic but don't get what is the difference between this resistor symbol and this one ?

Edit: datasheet of SN74LVC1G07DCKR

Manu3l0us · Accepted Answer · 2017-08-23 07:32:28Z

6

It's actually used as a level-shifter. It's converting the 3V PCH_PLTRST# to a 1V open-drain signal. In many cases, the reset input of a CPU can also act as an open-drain output, so the CPU can reset the surrounding system. If that's the case, you shouldn't drive the reset pin using a push-pull signal, otherwise it will create a short circuit when the buffer drives high and the processor pulls low.
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R32 is the pull-up, see above. Not sure about the purpose of R34 though.
The special resistor symbol stands for a bridge made by solder or directly on copper on the PCB, but still offers the possibility to remove the bridge and install a component. The @ near means, that no component is installed.

answered Aug 23, 2017 at 7:11

Manu3l0us

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\$\begingroup\$ Thank you for answer but what do you mean "What is the context?" \$\endgroup\$
– Roh
Aug 23, 2017 at 7:16
\$\begingroup\$ @Roh In which context are those different resistor symbols used? Can you post a screenshot? \$\endgroup\$
– Manu3l0us
Aug 23, 2017 at 7:20
\$\begingroup\$ Ok, e.g. see resistors R10,R11 and R22 in page 6 and compare them with other resistors in that page. \$\endgroup\$
– Roh
Aug 23, 2017 at 7:23
\$\begingroup\$ @Roh ok, now it makes sense, I edited my answer \$\endgroup\$
– Manu3l0us
Aug 23, 2017 at 7:33
1

\$\begingroup\$ @Roh When you use a push-pull buffer connected to a reset input, which also can act as an open-drain output, you can run into problems when the CPU pulls it's input low and the buffer is still driving high. This will create a short circuit between supply and ground. \$\endgroup\$
– Manu3l0us
Aug 23, 2017 at 8:19

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Spehro Pefhany · Accepted Answer · 2017-08-23 07:32:42Z

5

The 74LVC1G07 is open-drain, so it looks like it is used as a voltage translator from 3V to a lower voltage (1.05V). R32 is the pull-up.

R34 is used to minimize reflections and will be found close to the buffer end of the trace.

R35 appears to be an optional strap low and I would expect it will be unpopulated.

answered Aug 23, 2017 at 7:32

Spehro Pefhany

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\$\begingroup\$ R35 is actually unpopulated, marked by the @. \$\endgroup\$
– Manu3l0us
Aug 23, 2017 at 7:39
1

\$\begingroup\$ @Roh it is a series termination and the resistance plus output resistance of the buffer should equal the characteristic impedance of the trace (probably 50 ohms). It is more effective for the falling edge. \$\endgroup\$
– Spehro Pefhany
Aug 23, 2017 at 7:55
1

\$\begingroup\$ Cost difference is not significant- probably it had some characteristic that was superior or it was used in the ivy bridge reference design. \$\endgroup\$
– Spehro Pefhany
Aug 23, 2017 at 7:59
2

\$\begingroup\$ @Roh - The '07 buffer used here is non-inverting. If a N-FET was used instead it would require two of them to level translate and end up non-inverting. \$\endgroup\$
– Michael Karas
Aug 23, 2017 at 9:28
1

\$\begingroup\$ Another point of the buffer is likely the selection for minimal propagation delay. Often there is a need for a signal like the PLTRST# to deassert (go high) to various devices at essentially the same time to provide for a deterministic behavior between those devices. Carefree selection of discrete components for circuits like this may be cheaper from a BOM perspective but could end up showing significant timing skew between different buffered versions of the PLTRST# signal. \$\endgroup\$
– Michael Karas
Aug 23, 2017 at 9:38

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