# Non-trivial logic function to CMOS schematic

I wanted to implement the function:

$$Y = \neg (A \land (B \lor C))$$

This is what I came up with, it looks correct to me but I would like a second opinion on that.

simulate this circuit – Schematic created using CircuitLab

• 'it looks correct" - I've had many circcuits that looked correct but turned out to be wrong - that is what simulators are for Aug 23, 2017 at 9:15
• sorry I dont know how to simulate this or any kind of circuit Aug 23, 2017 at 9:17
• Yet you entered your circuit into a simulator. I'm not an expert on digital simulation, but you could easily just write out a truth table for this logic function, and then do a DC operation point analysis to find all the output voltages of the different nodes (And thus your output) as a function of the input. A lot of simulators will even allow parametric sweep with which you could do the entire simulation of this in one run. Aug 23, 2017 at 9:19
• sorry I thought the tool was just for designing schematics. can you maybe link me where I can get started quickly to simulate the circuit ? Aug 23, 2017 at 9:20
• How about the "simulate this circuit" button next to the image? Aug 23, 2017 at 9:22

From your drawing, I derive this:

simulate this circuit – Schematic created using CircuitLab