# Input leakage current

In the datasheet (like http://www.mouser.com/ds/2/149/NC7SZ125-98364.pdf), there is a spec of input leakage current ( +/- 10uA in this case). I'm wondering about this current. Is this current flow inside to the chip? or it can be out from the chip? Why is there a -10uA current? Does it mean that the current may flow out of the pin? And, if I have a pull-up or pull-down resistor at the input pin, should I consider the resistance, to avoid violating the VIH or VIL? Say, if I have a 100K Ohm pull-down resistor, will the 10uA flow out (-10uA) and go through the resistor, and create a 1V voltage on the input pin? that might exceed the VIL of the input pin spec...

Thanks.

Add the picture of the reverse-bias leakage.

• You might want to reformat your question a bit to make it better readable (you need 2 enters for a new line in the body). But I think you got the interpretation and implications quite right. Aug 24, 2017 at 13:10
• + would be in, - would be out.
– user16324
Aug 24, 2017 at 13:12
• 10 uA is indeed a lot for a CMOS (?) input but do note that this 10 uA is a maximum value and also over temperature. Typically at higher temperatures this (usually ESD diode leakage) current increases a lot. Note also that there is no typical value meaning, it can be anything below 10 uA. Typically it is so low that you cannot even measure it without specialist equipment. Aug 24, 2017 at 13:25
• Expect large leakages at +125C. Expect the leakage to drop by 10:1 for every 10degree C the temperature is reduced. If 10uA at +125, expect 10nanoAmp at +85C; expect 10picoAmp at 55C; expect 10 femtoAmp at +25C. Aug 25, 2017 at 6:05

The input leakage current has various contributions. Here are some of them

1) the input protection circuitry (typically diodes).

2) parasitic surface conductance (very low) of the package.

3) leakage current, through the gate dielectric of the CMOS (This is very very negligible, unless dealing with very thin-oxides)

4) Other leakage sources, such as at the surface of the silicon die, between bonding wires, etc. These are all very low.

The largest source of leakage is 1 and, in some minor extent 2 (This depends on the surface contaminants). The other are by far very negligible. Cause 1 is also very sensitive to temperature.

I found that typically the producers are very conservative with their specs, and 10uA was some orders of magnitudes larger than what I characterized with a parameter anaylzer (B1500A), at least at 25°C.

Of course, a "large" input leakage can also be present on some input with pull-up, or on some logic with bus-hold function, but this is not the case of your IC.

The direction of the leakage current is not known a-priori. It depends on the external voltage applied to that pin.

• Thanks for the feedback! Just want to make sure that I understand it correctly, the leakage which dominates is the reverse-bias leakage of the protection diodes, like shown in my attached picture now, right? Aug 24, 2017 at 15:12
• Yes, that's the major source. Aug 24, 2017 at 15:18

Yes, your interpretation is correct. Current can flow in or out of the input. It has to flow to or from the supply rails so it is most likely to be maximum -10uA with Vin = 0 or maximum +10uA with Vin = Vdd.

You should consider the input current if you are going to be adding high value resistors such as 100K.

You should design to the data sheet limits, however you might be interested to know that the typical current in or out of the input will be much, much lower than the specified maximum, probably 1nA or less at room temperature. They make the specification so loose because it speeds up testing and in (most) digital applications nobody cares.

The input current is composed of two parts- the smaller part is the gate leakage, which is probably pA or fA, and the reverse leakage of the input protection diodes, which dominates. They don't show schematics of modern CMOS parts, but here is a datasheet excerpt from a very old 4000-series CMOS part that shows the internals to some degree: