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I have a board in which there's two chips connected to I2C bus. I have tried to keep a distance and a ground plane between scl and sda lines. The routing topology is: mcu in the center and the two chips at the opposite directions (chip1-mcu-chip2) . The total length of SCL line is measured by altium about 100mm and SDA about 80mm.

My question is if there will be any problem due to length difference?

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    \$\begingroup\$ Thing to consider would be line-to-ground (and line-to-line) capacitance relative to the strength of pull-ups. For example 10 kohm and 100 pF has time constant ~10 us which is not directly negligible for ~100 kHz data rate. Note that any difference in capacitances will affect timing much more than length/propagation time, but OTOH I2C should not need any precise timing between SDA and SCL edges so mostly no issue anyway. \$\endgroup\$ – Martin Aug 25 '17 at 9:34
  • \$\begingroup\$ How do I calculate this capacitance? \$\endgroup\$ – MrBit Aug 25 '17 at 11:13
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For the I2C bus the length difference that you have will not be a problem. This bus operates at a rather low frequency (100kHz or 400kHz is typical) and 20mm of trace difference is barely noticable in the flight time of the signal edges.

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