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Considering a 6-Layer PCB with the layer sequence as below:

1-Signal

2-GND_Plane

3-Signal

4-Signal

5-VCC_Plane

6-Signal

-What are the considerations that I should take care of when making drill pairs for VIAs?

-Is it possible to make a VIA starting from 1st layer to 3rd layer and also from 1st to 4th without any consideration? If not possible, what is the best way to connect these layers?

Generally, is there any suggestion for multilayer PCB drill pairs that is practically possible to fabricate and has the minimum limits for traveling between layers and also has the minimum impact on price increment?

I'm using Altium Designer and have BGA devices such as LPDDR3 RAM (if is important!).

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    \$\begingroup\$ Step 1. Get with your board house and talk about their blind and buried vias and VIPPO capabilities. \$\endgroup\$ – Matt Young Aug 26 '17 at 15:12
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    \$\begingroup\$ Where I work, it is very common to use 6 layers 1n1 HDI technology when dealing with BGA pitch < 0.5mm. 1n1 refers to 1 HDI layer(top) + N layers + 1 HDI layer(bottom). Microvias (HDI) are used to get from the outer layers inwards (in your case layer 1->2 and layer 6->5). Then, through holes (passing through all layers) are used to connect from layers 2 and 5 to anyer layer (1-6). \$\endgroup\$ – Daniel Aug 26 '17 at 15:55
  • \$\begingroup\$ @MattYoung That's a good Idea \$\endgroup\$ – Milad Aug 26 '17 at 18:02
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Generally, is there any suggestion for multilayer PCB drill pairs that is practically possible to fabricate and has the minimum limits for traveling between layers and also has the minimum impact on price increment?

Yes. For these goals, use through vias only. This is possible to fabricate and will in fact have the lowest cost of any via technology. It allows electrical connections between any two layers, meaning it doesn't restrict layer connections at all.

Your other choices include, roughly in order of increasing cost:

  • Through vias with back-drilling aka controlled-depth drilling: This means after through vias are drilled and plated, the board is returned to the drill machine and some portion of the via is drilled out again to remove the plating. This is used to reduce the capacitive parasitic for high speed traces. It does not improve the possible density of the board because the vias still take up space on all layers. The layers to be connected by the back-drilled vias cannot be in the region drilled out by the back-drill.

  • Sequential lamination: This means making up different sub-assemblies of the board (for example, in an 8-layer board, layers 1-4 might be in one sub-assembly, and 5-8 in another sub-assembly). Then each sub-assembly is drilled and plated. Finally the sub-assemblies are laminated together to make the completed board. This can improve signal integrity and improve board density, because the drills in one sub-assembly don't take up space in the other sub-assembly.

  • Micro-vias: This means vias drilled from either the top or bottom of the board through (typically) just the first one or two layers of dielectric. Often these are laser-drilled, but they can also be mechanically drilled. With laser drilling, they can be very small (.04 - .08 mm). This can improve both signal integrity and board density, compared to through vias. Micro-vias are commonly used beneath fine pitch BGA devices to achieve a reasonable break-out pattern. Micro vias can also combined with sequential lamination to achieve (for example) connections between layers 2 and 3 without impacting routing on other layers.

Usually any of these technologies is used in addition to, rather than as a replacement for, through vias.

Using any of these additional via technologies adds manufacturing steps (often both drilling and plating steps) and increases board cost, compared to just using through vias.

You should consult your fabrication shop for design rules and manufacturability recommendations before using any of these technologies.

Is it possible to make a VIA starting from 1st layer to 3rd layer and also from 1st to 4th without any consideration? If not possible, what is the best way to connect these layers?

Yes, a through via can connect these layers.

If you need to increase the density, you could also use sequential lamination or micro-vias.

Micro-vias are limited in aspect ratio (height to diameter ratio) and this generally limits them to layer 1-2 or maybe 1-3 connections (and typically requires using a very thin dielectric, maybe .08-.16 mm, between those layers). Using micro-vias would be facilitated if you changed your stackup to have signal on layers 1, 2, 5, 6 and power and ground on 3 and 4. With the thin layers used, it would not likely degrade signal integrity much to have return path on layer 3 for the signals on layer 1.

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This is a really complex subject- the drill pairs only reflect a bunch of other technology choices which all can have a dramatic effect on cost. I am currently working on an IPC Type III HDI design with microvias and buried conventional vias. Layers and stack up have a big effect (avoid asymmetrical stack ups and either use similar thicknesses or the board makers default stack up). The number of drill setups, minimum mechanical drill size, and the number of laminations all have big effects. And if you need controlled impedance and on how many combinations do you need to control differential and single ended impedance. If you need something fancy they may have to do two runs to get it right.

It's also quite possible to design a PCB that is literally impossible to fabricate because no sequence of drill cycles and sequential laminations will produce all the vias.

I suggest looking at IPC 2226 (you can find working drafts on the net). The IPC illustration appears to show an odd number of layers, which would be very unusual, but the key thing is what is happening in the two outer layers on each side, what the buried vias do, and the through vias.

enter image description here

Mentor Graphics also has a free paper that is useful (you have to register and their sales folks will phone so I won't link it).

For lowest cost, use only through-hole vias, of relatively large size. Next step up would likely be just blind vias that connect the two outermost layers on each side plus buried vias and through-hole vias. If your design involves micro BGAs things may get more complex again.

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