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The 80s digital logic PCBs and more precisely arcade game PCBs were laid out in a specific manner.

What is noticed as a PCB novice: 1) The (mostly 74 series TTL) ICs are laid out in a strict regular grid 2) There were quite thick power/ground planes around the board 3) There was quite a lot of space between ICs, much more than on later boards using DIP ICs *

  • I do not know however if the later boards were multi-layer (>2) boards. The C64 board looks much more crowded, although from the same era.

Can anyone elaborate on why PCBs from that era were made like this?

What was a limitation of the design process (CAD/Manual) or manufacturing/assembly process?

Was the regular layout (point 1) only to make troubleshooting easier? I often read in service manuals things like: "Solution: Bad 74LS20 at location 3A"

Is there any read-up on the theory of these layout guidelines?

http://arcade.ym2149.com/pcb/taito/galaxian_m22lb_partside_pcb.jpg http://arcadeshop.com.whsites.net/pics/galbootb.jpg

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    \$\begingroup\$ What pattern would you choose, triangle? \$\endgroup\$ – Marko Buršič Aug 28 '17 at 7:27
  • \$\begingroup\$ This is explained in the book High Speed Digital Design: A Handbook of Black Magic, but I don't have it at hand right now so I can't write up an answer. \$\endgroup\$ – pipe Aug 28 '17 at 7:35
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    \$\begingroup\$ Looks like boards designed by autorouter software. Note how each layer has either mainly vertical or horizontal connections. The space between the ICs is used to have a place for vias to go from one layer to the other. It is a good compromise between speedy design and options to change things later. In a design where everything "just fits" there's very little room for making changes without having to make space for that change first. The C64 board was mass produced so there would have been more to be gained to spend more time and make the PCB as small as possible. \$\endgroup\$ – Bimpelrekkie Aug 28 '17 at 8:11
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    \$\begingroup\$ Most of those chips are dealing with address or data busses. It makes sense to lay the busses out in straight lines. \$\endgroup\$ – JRE Aug 28 '17 at 8:24
  • \$\begingroup\$ Also, I would almost bet that each column is a functional area. Video stuff in a column (or two or three,) inputs in another column, etc. \$\endgroup\$ – JRE Aug 28 '17 at 8:31
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It was mainly convenience. Having the ICs in a regular grid has lots of advantages, some of which you've mentioned.

With low functional density, any significant application needed a lot of ICs, so the ability to refer to them in documentation by a grid system made for much easier debugging.

You'll notice that ICs of different lengths are still placed on a regular grid, so it's the grid that's important, not the space between them. The improvement in area that you could get by squeezing them together is small, and outweighed by the loss of convenience. It's one less thing to think about when laying them out, the ICs are going to go here, the power grid is going to run in straight lines here and here.

It's not a CAD limitation per se, after all, the CAD copes with local departures from regularity quite happily.

Ye olde 74 series TTL was very power hungry, so boards like this needed (relatively) thick/wide power tracks. LS74 cut that power a lot, and by the time HC cmos came along, processors and logic arrays were starting to reduce the need for boards of dense logic just to get functionality.

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  • \$\begingroup\$ Another advantage for memory devices (8 64k x 1 devices for the C64 as I recall) was flow-through routing. \$\endgroup\$ – Peter Smith Aug 28 '17 at 11:09

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