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I'm trying to extract data from a 4x14 segment alphanumeric display controlled via 2*595 in series and 4 transistors. Serial data is fed from STM32f103, its firmware should not be changed. Problem is that Atmega running 16MHz can't cope with 2.2MHz SPI clock from ARM. And it is a 16bit continuous word, Atmega has only 8bit SPDR buffer.

Is there some one-chip solution that would allow me to store data from dataline, and read it on slower clock as master between transitions? I don't have enough pins to do it in parallel. Will or-wired (diodes) clock on 595's work?

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If you have access to the 595s then you may be able to clock the serial data out of them after they have been loaded by the STM32. The ATmega would monitor the latch signal (perhaps using pin change interrupt), then clock the data out via the second 595's QH' pin once it has been stored in the output registers.

You would need to switch the 595 clock input between the STM32's SPI clock and a clock output from the ATmega. If the SMT32 clock idles low then a simple OR gate would suffice, or you could make a multiplexer from 4 NAND gates (one 74HC00 IC).

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ Latch is running 125Hz, and I have 10 pins. \$\endgroup\$ – FeroFixxer Aug 30 '17 at 18:18
  • \$\begingroup\$ Don't know how that happened, it was suppossed to be a comment! \$\endgroup\$ – Bruce Abbott Aug 30 '17 at 19:06
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I worry that an 328p is no match for a 72MHz Cortex-M3 with DMA. SPI clock speed is not the problem (328p can go up to F_CPU/2), but the inter-byte time. You can easily get one byte, SPI peripheral will give you an interrupt. You then have to process/store that byte and wait for the next one. If the STM32 is using DMA then there is literally no delay between bytes, so no matter how you optimize ISR code you'll loose data.

I would attack the problem with a SN74LS674 - 16-bit paraller in, serial out register. Connect it to all the outputs of the 595s and read over SPI.

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One solution is a small 8-bit micro with an SPI subsystem that can handle this speed. 2.2 MHz is not very high for SPI, so most "modern" micros should do it, and have enough RAM to buffer everything. Reading it out can be done in any way convenient for the Arduino.

You will probably not find a custom IC for this application, and if you do, it will be more expensive than a small 8-pin PIC or AVR. Microcontrollers are today sometimes cheaper than the 595's.

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I'd suggest you don't need to work with the high speed output shift register at all. What you describe is a simple multiplexed display where the individual digits (14 segments) are turned on for relatively long periods by the 4 enable signals. The data outputs are stable for the complete display period for each digit.

  1. Take the four digit enable signals to 4 328p input pins using the (I assume here) falling edge to trigger an interrupt. You now have an ISR for each digit as it is enabled. Since it's likely that the scan rate for the digits is less than 2 kHz or so, so you could expect that each digit is enabled for about 500 us.

  2. Feed the 14 segment data bits into 2 * 8:1 multiplexers (74HCT151), with the output bits each going to one input pin on your 328p.

  3. Use three output bits on the 328p to set the bit being received from the low/high byte of the segments.

For the code, when you receive an Interrupt from the digit enable:

  1. Set select to zero (0x000) for the muxes
  2. Read LS bit on each byte and store value in 2 memory locations for digit.
  3. Inc select to loop through and read each bit in the low/high byte.
  4. Ret

Since the interrupts never conflict, you can use a single routine to read/loop and simply set up a pointer for storing the low/high bits.

This would end up being a 2 chip + MCU solution, with 6 input pins and 3 output pins used on the 328p. You might also need pullup resistors on the scan transistors. (you'd need to provide some schematic information to be able to ascertain the need)

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