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I was trying this circuit Amplificators in inversor mode

I have calculated the transfer function as
\$H(S)=\frac{R_{2}R_{3}R_{5}}{R_{1}(R_{2}R_{4}-R_{3}R_{5})}\$
Then I applyed a sin signal at 100 Hz, showed here enter image description here

this does not make sense with the transfer function since applying the values of the components gives a gain of -10 and in the practice this gives a gain of -100.
But the reason of this question is when I raise the frecuency to 4800 Hz the cropped top of the output signal appears complete! enter image description here
Why? I understand that with the 100 Hz signal thats the physical limit of the 741 in this mode with the components showed, the \$R_{5}\$ control the gain, but I do not figure out this effect.

the green signal is the input and the blue is the output.

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    \$\begingroup\$ "due to the frequency compensation, the 741's voltage gain falls rapidly with increasing signal frequency. Typically down to 1000 at 1kHz, 100 at 10kHz, and unity at about 1MHz." and that's why we don't use 741 op amps. \$\endgroup\$ Aug 31, 2017 at 17:35

2 Answers 2

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You have positive feedback of 50% of output swing which determines the hysteresis along with DC offset . Thus a lousy Schmitt Trigger gain stage with low inter-stage gains of 10 then 10%. Try noninverting input for stage 2. Then you have a linear gain >10... still not useful.

Try gains of 100 for each stage i.e. Rf/Rin=100, then see the improvement on sensitivity of your positive hysteresis by reducing positive feedback ratio to 1% of output swing or R5/R1=100 for a signal threshold of about 1% of 8Vout or 160mV pp hysteresis.

Compare this to a CMOS Schmitt inverter with 3 stages of gain x10 minimum =1000 min and input bias thresholds for hysteresis of 1/3 from Vdd/3 to Vdd*2/3

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The output is clipped in the first picture because your amplifier output runs into the supply rails. In the second picture at higher frequency the gain has dropped enough that the amplifier can output a complete sinusoid.

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