I need to design an amplifier providing voltage gain of 100.

Capacitor calculations are done based on 14 Hz high pass.

Here's the design :

enter image description here

Vcc = 9V Vin = 50mV, 20 Hz

To calculate RC and RE, I derived KVL equation from the CE loop (right hand side of the circuit) by drawing DC equivalent. Then assuming that RE is about 5 times greater than RC, I gave the values.

R1 and R2 calculations are done by using this formula below. enter image description here

I do not get the amplification rate I desire. What could be the problem ?

If someone explains how to and where to start a design, how to use datasheet values, I really appreciate it.


  • \$\begingroup\$ "Then assuming that RE is about 5 times greater than RC". \$Kv = -RC/RE\$, so the assumption is wrong. \$\endgroup\$ Commented Sep 1, 2017 at 11:33
  • \$\begingroup\$ Measure the gain at 200 Hz with a 1mV input and you will see a different result; more gain. \$\endgroup\$
    – sstobbe
    Commented Sep 1, 2017 at 15:58
  • 1
    \$\begingroup\$ I see that you have changed the question title to include "SOLVED". That is not the way things are done here (remember, this is not a normal forum - it's a Q&A site). Instead, please follow the help center article about "What should I do when someone answers my question?" and accept the best answer (i.e. the one which best answered your question). That will mark the question as "answered" - just adding "SOLVED" to the title does not mark the question as answered! \$\endgroup\$
    – SamGibson
    Commented Sep 6, 2017 at 23:08

2 Answers 2


100 is too high of a voltage gain to attempt to get from a single transistor. Remember that for amplifier gain to be predictable, the transistor must be used with negative feedback so that the gain it produces is at least several times less than what it could do open loop.

Start with at least two stages. A voltage gain of 10 per stage in the final closed loop circuit is quite achievable.

The reason you aren't getting the gain the equations are indicating is because those equations effectively assume infinite gain from the transistor. That's a valid approximation when the actual closed loop gain is significantly less than what the transistor could provide open loop. However, that approximation is not valid when you are asking for 100x closed loop voltage gain from a single stage.


On the emitter, we have 15µF//750R which at 20Hz has an impedance of about 433 ohms... actually (250 -353j) complex but its magnitude is 433 ohms.

Adding about 25 ohms of internal emitter resistance, this gives 448R, since Rc is 3.75k we have a gain of 3750/448 or about 8.4 and of course some phase shift as the "digital scope" shows, due to the impedance being complex and not purely real.

So you don't get your gain at 20Hz because the capacitor is too small.

Having an accurate gain of 100 with such a single-stage circuit is unrealistic, as Olin explained. Much better to use an opamp, even a 30c dual opamp will give an accurate gain at 20Hz and cost less (and use less space) than just the capacitor required here.

  • \$\begingroup\$ Thanks a lot. What about using FETs ? \$\endgroup\$
    – PIC16F84A
    Commented Sep 1, 2017 at 12:30
  • \$\begingroup\$ What about FETs ? (MOS)FETs are even more unpredictable regarding accurate amplification than BJTs. At least in a BJT the gm scales with Ic directly and over a large range. \$\endgroup\$ Commented Sep 1, 2017 at 12:55
  • \$\begingroup\$ Exactly. Also Vbe dispersion is low while Vgs-th dispersion is huge. However JFET/FET-input and CMOS opamps are useful, the very low input bias and noise currents allows use of high value feedback resistors (saves power) or amplifying a signal from high impedance sources... \$\endgroup\$
    – bobflux
    Commented Sep 1, 2017 at 13:53

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