I've been designing a 4 layer board (layer 1 & 4 is copper, layer 2 is all ground, and layer 3 is used as a power plane).

I've been using decoupling caps. to filter out the ac noise coming from the power source (3.3V) that uses the power plane from layer3 from an LDO.

The decoupling caps. I've been using are on the bottom layer and have the values of 100pf, 10nf, and 10uf that are close to the DUT pins. From the equation, x = 1/[2(pi)(f)(c)] the frequency is 2.4GHZ and all the values of the caps. shows that x < 1.

Due to space constraints, I've been told that since 10uf resonates at a lower frequency it's allowed to be further away from the DUT pins and closer to the source. Is that true?

  • \$\begingroup\$ the current should be around 500mA \$\endgroup\$ – jlin112 Sep 3 '17 at 20:36


The higher the frequency you are trying to decouple, the closer the cap needs to be. Conversely, when a cap is intended to handle low frequencies, it can further away than one that handles the high frequencies.

The further away, the more inductance is in series with the cap. The point is to minimize the impedance at the high frequencies, so obviously series inductance is bad. The lower the frequency, the more series inductance you can tolerate before it becomes significant to the overall impedance.

| improve this answer | |
  • \$\begingroup\$ Hi, are there any equations that demonstrate how lower frequency can tolerate more series inductance and how higher frequency can't tolerate it. \$\endgroup\$ – jlin112 Sep 4 '17 at 19:28
  • \$\begingroup\$ @jlin: Yes, the equation of the impedance of a inductor. \$\endgroup\$ – Olin Lathrop Sep 4 '17 at 20:56
  • \$\begingroup\$ Of course! I am an idiot... \$\endgroup\$ – jlin112 Sep 5 '17 at 3:02

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