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I am trying to build a pulse generator that is triggered on by the leading edge of a clock signal, stays on for one full clock cycle, and is triggered off by the next leading edge from the clock.

Something like:

Clock:  ___-----_____-----_______-----___
Signal: ___----------____________--------

Any thoughts?

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    \$\begingroup\$ Are you looking for a T flip-flop? \$\endgroup\$ – The Photon Sep 5 '17 at 23:54
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    \$\begingroup\$ Use a divide by two. \$\endgroup\$ – Transistor Sep 6 '17 at 0:03
  • \$\begingroup\$ Even though you do not mention it, I suspect there is ANOTHER trigger also required. Otherwise you will continually re-trigger. Please clarify. \$\endgroup\$ – mkeith Sep 6 '17 at 1:05
  • \$\begingroup\$ As @Transistor says just use a D-Type FF with the Q-Not output tied back to the D input. Apply your Clock signal to the CLK pin of the FF and your "Signal" will appear at the Q output. \$\endgroup\$ – Michael Karas Sep 6 '17 at 1:32
  • \$\begingroup\$ @MichaelKaras - That's the normal implementation of a T flip-flop as suggested by The Photon. \$\endgroup\$ – WhatRoughBeast Sep 6 '17 at 1:54
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The behavior you described in your timing diagram is exactly the behavior of a T flip-flop.

As mentioned in comments, you normally make a T flip-flop by connecting the inverted output of a D flip-flop back to the input.

If you actually want to have this behavior happen sometimes and not others (for example, when an ARM signal is active), you may need some additional logic to accomplish that.

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  • \$\begingroup\$ A T flip flop is exactly what I was looking for and you are correct that I want it to go high exactly one time and then go low until I retrigger it. What additional logic would I need? \$\endgroup\$ – T. Mastin Sep 6 '17 at 15:28
  • \$\begingroup\$ You might need a RESET signal to ensure it starts out in the low state. Then if, after it's gone high and then low again, you want it to ignore some inputs for a while, you might need an ENABLE signal to tell it to ignore those inputs. \$\endgroup\$ – The Photon Sep 6 '17 at 16:17

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