I'm designing another Silicon Photomultiplier circuit. Right now, it is in the theoretical stage. My team and I have made numerous circuits, and the basic template is below:
Below are some links to the main parts used:
The amplifier is the Texas Instruments OPA656 op amp. It contains a slew rate of 295 V/µs and a bandwidth of 500 MHz.
The Silicon Photomultiplier (SiPM) is a SensL MicroFJ-60035-TSV, the 6 mm version. It contains a PDE of 51%, and it has a gain of 5.3*10^6 from the anode to the cathode, and a typical dark current of 4.1 µA, with a rise time of 300 ps, and a max current limit of 15 mA.
The resistors and capacitors can be adjusted as needed, but this is what my team is working with so far. We have two channels, each independent of each other in this configuration, and the team is trying to measure coincidences between the two. Now, my training is as an electrical engineer, not a nuclear engineer, so this is all new to me, but from what the team has told me briefly, between measuring the time between the two detectors, we are getting around 400 ps. Now, I'm not sure if this is the time difference between the two channels or if this is the rise time of one individual channel, but when I find out more information, I will update this accordingly.
The timing is good, but because the amplitude was smaller than what we require, we had to use an external amplifier to 'boost' the signal. From what I was told, the external amplifier did not affect the timing, but we can't rely on it forever. Thus, I was wondering what I could do to improve the timing of this circuit while achieving a larger amplitude? We are hoping to try and achieve a coincidence timing of 300 ps.
The amplitude can be adjusted by adjusting R1 and C1, so I'm not entirely concerned about that. The one thing that I don't really know how to adjust is the speed. My first thought was to switch out the OPA656 for another amplifier with a faster slew rate, but it feels like just swapping it out might not be enough. Obviously, there are other considerations to take into account when picking a new amplifier, but how can I pick a better one taking into account the parameters of the op amp? If we're talking about just the schematic below, putting aside the board layout for now, what else can I do for the timing?
EDIT: My team gave me some values for what they want out of this circuit, so I added them below, and I also adjusted the circuit to showcase the current board schematic. I apologize for not making it clearer, but with the current comments they gave me, I felt it was imperative that I highlight the change.
Currently, our board uses a single set of power supplies (-30 V, +5V, -5V, and GND) to power the entire board. This is shared amongst all SiPMs and op-amps with just one set of decoupling capacitors. For the next design, I'll make sure to power them independently of each other.
We achieved a signal rise time of 6.5 to 9 ns using a 25 ohm resistor. Initially, our feedback resistor was 470 ohms, and while that provided a high gain, it was too slow for our needs. We played around with various feedback resistor values, and we found that 25 ohms gave a really fast time. However, the issue with this value is that the gain is very low, with the max amplitude being around 160 mV, so we needed a second amplification which was done through a NIM module. For my next design, we would like to keep the timing as low as possible while hopefully achieving a 600-850 mV output voltage, a rough gain of 5.5x, so that we can take advantage of the dynamic range of our ADCs. What would be the best way to go about this, keeping the speed the same while increasing gain? Assuming that we power each channel independently in the future, the only other major change I can think of is swapping out the op-amp for another one with faster slew rate and step time.