Are VHDL procedure and function only able to infer combinatorial logic even of they are called from within a process that is clk edge sensitive?

If so, is there really no way for them to infer registers?

  • \$\begingroup\$ Both VHDL and Verilog infer sync and async RS and sync clock in Q output vectors but by different methods. Latches or registers are using: Process (VHDL) and always block (Verilog) Concurrent state assignment \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Sep 7 '17 at 15:51
  • \$\begingroup\$ My question is about VHDL procedures and functions, not process or always block. \$\endgroup\$ – quantum231 Sep 7 '17 at 18:54
  • \$\begingroup\$ A function is an expression, part of a statement or providing a default or initial value in a declaration. A procedure is a statement. Both are found in processes after elaboration. Any wait statement found in subprogram suspends that process. Inferring sequential logic (e.g. registers) is performed by the recognition of a pattern sequence of statements providing control flow in a process or implicitly elaborated process from concurrent statements, targeting assignment. There are cases where that sequence of statements can be found entirely within a procedure, a statement inside a process. \$\endgroup\$ – user8352 Sep 7 '17 at 19:39
  • \$\begingroup\$ IEEE Std 1076-2008 11.4 Concurrent procedure call statements - A concurrent procedure call statement represents a process containing the corresponding sequential procedure call statement. \$\endgroup\$ – user8352 Sep 7 '17 at 19:40
  • \$\begingroup\$ The thing is that variables are not bound by clock and we can only have variables local to a procedure. A procedure may access signals inside the architecture but that is not helpful in my case. Basically, I am converting some C code to VHDL to carry out the elaborate calculation in hardware. The C code has #define macros. I was confused how to implement them such that they are pipelined. I have decided to create an entity to implement each of these macros now. \$\endgroup\$ – quantum231 Sep 7 '17 at 20:56

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