I have placed two additional vias on the thermal pad of the IC. Though the datasheet does not specify thermal holes, but I just did them to connect the pad with the internal ground plane (2nd layer). I am not able to figure out, why altium claims that there is an error and the vias are not connected. Why shall I connect the vias with extra track? Are not they connected through the ground plane? Please help. This happens many times with me.
That was definitely the Pads were not connecting to the Ground Plane well due to the Thermal Cutouts. I had to disable the cutout by creating a new rule for such Pads and it seems the error is gone now :)