I am reading Morris Mano book on digital logic which clearly says that " latches are level sensitive devices or level triggered and flip flops are edge triggered devices" which means latches also depend on clock.
Now which one is correct? Can someone please explain it clearly?
A sequential element is called a flip flop if it is edge triggered. There must hence be an input to the flip flop that on transitioning 'triggers' it to evaluate the output. In other words, a flip-flop is an element that maps the inputs to the outputs at an instant when there is a level transition of this 'triggering' signal. If this triggering must occur periodically, a clock is connected to this input.
Similarly, a sequential element is called a latch if it is level triggered. There may hence be an input to the latch which on being in a certain level 'triggers' it to evaluate the output (Or, you could forego designing it with such a signal and it would still be called a latch). A latch hence is 'enabled' when this triggering input is at a certain level. It would be more appropriate to see this signal as an enable signal than as a clock. This is because a clock is a signal that is used to identify specific instants of time at its edges.