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I'm trying to make a vhdl implementation of an 8-bit shift register that is initialized to "11111111" each time a reset push button is pressed, before the shift register starts to receive values from a random binary sequence generator.

How do I go about implementing this in vhdl ?

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  • 7
    \$\begingroup\$ Let's see your code so that we can see where you're going wrong with what you've tried. \$\endgroup\$ – scary_jeff Sep 14 '17 at 7:53
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Depends on whether the reset is synchronous or asynchronous.

For an asynchronous reset, it would be something like this:

process (CLK, ARST)
begin
  if (ARST = '1') then
    --insert reset logic here
  elsif (rising_edge(CLK)) then
    --insert regular logic here
  end if;
end process;

With a synchronous reset:

process (CLK, RST)
begin
  if (rising_edge(CLK)) then
    if (RST = '1') then
      --insert reset logic here
    else
      --insert regular logic here
    end if;
  end if;
end process;
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