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I have created two identical circuits. The only difference between them apart from the number of lines on the LCD is that the old circuit uses 10K pull-up resistors instead of 100K pull-up resistors. I'll explain further...

I created a circuit in which data gets fed serially into shift registers (74HC164) via a serial port. The output of the registers are connected to a AT28C256 EEPROM which then loads the data to an LCD. This saves the micro controller from using up its space to store lengthy LCD messages.

When I tested things, both circuits turned on the LCD as expected, however in the newer circuit, the LCD didn't respond to anything where as in the older circuit, the LCD did respond and produced correct text on the screen.

I tested the LCD in the older circuit (even though it didn't fit), and the LCD does work.

I also tested the new circuit and fixed all the short circuits and open circuits I could find.

In both circuits, the pull-ups I described above are connected to the outputs of the shift registers (74HC164) because I was told that a solution was to use the 74HCT164 instead of 74HC164, but they might create EMI, and its harder to find 74HCT.

The reason why I jumped to 100K is because I wanted to save power on my circuit but the question is is 100K too high of a pull-up resistor value between an 74HC output and a cmos input? If so, what is the maximum value I should use?

EDIT: Just to clarify, old circuit uses 10K resistor pull-ups and new circuit uses 100K resistor pull-ups. Other than that, the schematic below was used for both circuits. Items marked J were staples that conduct electricity.

The LCDCLKB and LCDCLK connect together to prevent the 74HC164 inputs from floating.

circuit

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  • \$\begingroup\$ (a) The story is very difficult to follow without a schematic. Can you provide one, even if it's just a good quality photo of the paper one you may already have? (b) The question seems to contradict itself: New circuit = 10k pull-ups (so old circuit = 100k pull-ups). You say the LCD works in the "older circuit". So at this point, I'm thinking your story is about a problem with the new circuit, which uses the 10k pull-ups. But your title asks about 100k pull-ups - which (according to the text) is the old circuit! Confused :-( (c) The story sounds familiar. Didn't you already ask about this? \$\endgroup\$
    – SamGibson
    Sep 15, 2017 at 0:20
  • \$\begingroup\$ (d) Please provide links to other places where you've asked for help, so we can see the context where those answers were given e.g. you said you were "told that a solution was to use the 74HCT164 instead of 74HC164, but they might create EMI". I want to read more about why that person made that recommendation. (e) Why are you trying to use any pull-up between a 74HC output and a CMOS input? Again, the schematic is needed, but in the meantime, a brief explanation would help. \$\endgroup\$
    – SamGibson
    Sep 15, 2017 at 0:27
  • \$\begingroup\$ The only difference between 74HCxxx and 74HCTxxx is that the input threshold is Vdd/2 for HC' and 1.5V for HCT' to emulate the TTL input threshold. Both are CMOS and have same drivers and current spikes during transitions. If glitches or overshoot exists due to long traces on a tri-state bus may have a faster rise time with lower R pullups. No answer is possible without all layout and signal capture details. \$\endgroup\$ Sep 15, 2017 at 0:35
  • \$\begingroup\$ @Tony - "The only difference between 74HCxxx and 74HCTxxx is that the input threshold is Vdd/2 for HC' and 1.5V for HCT'" Exactly, which is why there must be something more to the story, if someone believed there was some EMI-related issue, and recommended the HCT as a "solution" to Mike. That's why I asked for the link to that discussion, as I want to read the context that led up to that recommendation to use HCT, in the hope that it sheds more light on this new question. \$\endgroup\$
    – SamGibson
    Sep 15, 2017 at 0:40
  • \$\begingroup\$ HCT is intended for low impedance Vol drivers and high impedance Voh drivers, in order to balance noise power margin. But if CMOS drivers are used, HCT will reduce voltage margin on Vol and increase margin on Voh. But CMOS drivers are symmetrical for overshoot and drive current and RdsOn source impedance. But if this is a tristate bus, HCT might make some unforseen timing difference. \$\endgroup\$ Sep 15, 2017 at 1:15

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the pull-ups I described above are connected to the outputs of the shift registers (74HC164)... is 100K too high of a pull-up resistor value between an 74HC output and a cmos input? If so, what is the maximum value I should use?

The 74HC164 already has CMOS outputs that actively pull up to Vcc, so you shouldn't need any pull-up resistors.

The output of the registers are connected to a AT28C256 EEPROM

The AT28C256 has TTL compatible inputs, so pull-ups should not be required even when driven with standard TTL logic.

I was told that a solution was to use the 74HCT164 instead of 74HC164

This sounds like there might be a problem with voltage levels on the inputs to the shift register. HCT logic has TTL compatible inputs (0.8V-2.0V), whereas HC requires CMOS input levels (1.3V-3.7V). If your microcontroller's I/O is 3.3V it might not work with standard CMOS, but should work with HCT.

The chart below shows input and output voltage ranges for various logic families. For an input to be reliably recognized as high or low it needs to be outside the purple/blue areas. Outputs normally stay inside the orange or yellow area.

Standard CMOS, HC, AC and AHC all have the same input and output levels. Their outputs are also compatible with HCT and standard TTL.

Standard TTL outputs may not be compatible with standard CMOS inputs because a TTL output can be as low as 3.3V. This is where a pull-up resistor helps, since it can pull the TTL output up closer to 5V.

enter image description here

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  • \$\begingroup\$ My micro is an AT89S52 \$\endgroup\$
    – user152879
    Sep 15, 2017 at 1:45
  • \$\begingroup\$ AT89S52 I/O actively pulls to ground only. Ports 1, 2 & 3 have passive pull-ups, but Port 0 has no pull-ups. If you are driving the 74HC164 from Port 0 you will need pull-up resistors on its inputs. 10k is stronger than 100k and so should produce faster rise times (important for clock signals) and have better noise immunity. \$\endgroup\$ Sep 15, 2017 at 2:12
  • \$\begingroup\$ Do you think by chance that the AT28C256 has a minimum rise time requirement for it to function correctly? If so, then maybe that's my problem there. \$\endgroup\$
    – user152879
    Sep 15, 2017 at 2:16
  • \$\begingroup\$ According to its datasheet the AT28C256 is read statically (which it needs to be if /CE and /OE are tied permanently low) and has no minimum rise time on address inputs. In any case this should not be a problem as it is driven by high speed HCMOS outputs. However the 74HC164 has a minimum 'recommended' rise time of 0.5us. If the clock rises very slowly it might cause the shift register to operate erratically. \$\endgroup\$ Sep 15, 2017 at 2:35
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    \$\begingroup\$ Rather than changing things randomly you should do some proper fault diagnosis. Are the shift registers outputting the correct addresses? If not, are all their inputs wired correctly and receiving the right signals? If they are, does the EEPROM output any data? If you previously had to fix shorts, perhaps a chip has been damaged. \$\endgroup\$ Sep 15, 2017 at 5:03

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