I am a little confused about the Truth table of D-flip flop,and i want to figure it out.

According to the d-flip flop in wiki:

D-flip flop with set(S) and reset(R):

If S=R=0,Q depend on clk and D,when clk is Rising edge,and D=1,Q=1

If S=1,or R=1,Q depend on S or R,when S=1,means set Q=1; R=1,means set Q=0

If S=1,R=1,Q depend on nothing,Q=1,Q'=1

But,if d-flip flop with reset,(no set here) ,when R=0,Q is not always 0,when clk is Rising edge,and D=1,Q=1

But i see the waveform in this picture,and the waveform is not the same as the the wiki said,can anyone help me figure it out? The picture is from this website: http://macao.communications.museum/eng/exhibition/secondfloor/MoreInfo/FlipFlop.html

enter image description here

  • \$\begingroup\$ Your wavefrom drawing shows Set and Reset as Active Low - if Set is Low, Q will be forced High. Your text describes a flip-flop with Active-High Set and Reset. \$\endgroup\$ Sep 15, 2017 at 15:34
  • \$\begingroup\$ Show the relevant Wiki citation and link. \$\endgroup\$
    – Eugene Sh.
    Sep 15, 2017 at 15:34
  • \$\begingroup\$ en.wikipedia.org/wiki/Flip-flop_(electronics) \$\endgroup\$
    – Shine Sun
    Sep 15, 2017 at 15:52
  • \$\begingroup\$ The diagram above should really show /SET and /RESET as the bottom two items. \$\endgroup\$ Sep 15, 2017 at 17:31

1 Answer 1


On many flip-flops the Set and Reset inputs are active low. The person who wrote the text and the person who produced the waveform seem to have used opposite assumptions about the active levels for the Set and Reset inputs.


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