I needed a VCCS so then I simulated the circuit below in LTSpice and it worked great. I also designed the PCB and produced it, solder it and it still works great. But I have a big problem!
When the input (positive input of the opamp) is left unconnected, and the load is connected, the opamp hugs the VPOS or VNEG rails (arbitrarly!) and the output current goes to 2.35A (I am lucky that I put that current limiting resistor so the current will never go above +/- 2.35 ampers.
I think this is because of the input offset voltage of the MP38 and the fact that with no input since it will be open loop...it hugs the supply rail (I do not understand why sometimes it goes to V+ and sometimes goes to V-).
So my questions are:
- Is what I said above the problem? or there is more to it?
- How to prevent this kind of behaviour (possibly with some schematics please!)
- What could I do better for this Circuit/PCB?