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I am trying to understand the concept behind the threshold voltage in a N-MOSFET. Upon reviewing various books and the band diagrams, I analyzed the following but still could not understand where do the mobile electrons come from.

I broke up the inversion layer creation to two steps:

  • Step -1 Gate voltage Vg
  • Step -2 Gate voltage Vg>=Vth

In a basic MOS structure, I see the following:

Step -1:

MOS Structure

As per KVL, the following relation is valid:

enter image description here

Also the following relation: enter image description here

Where QB is the bulk charge formed due to the application of gate voltage (less than threshold voltage). Hence a depletion region is formed because the holes in the p-substrate are depleted by the negative charge created at the Gate oxide interface (not sure about this). Here there are electrons created but they are immobile because they have recombined with the holes in the p-substrate.

Step -2 Now, when we increase the Gate voltage equal to Threshold voltage (Vth), still more electrons are created beneath the oxide which cannot have no holes to recombine since there is a depletion region barrier (created by step 1) to reach the next hole. Therefore these electrons are mobile at the interface between the substrate and the oxide. This is a layer of mobile electrons - forming an Inversion layer.

Is the above analysis valid?

Also, are the following assumptions true?

  1. Applying a positive potential at the Gate terminal creates free electrons at the interface between the substrate and oxide.
  2. The inversion layer is created only due to M-O-S- structure (no influence of source or drain regions).
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1 is true when \$V_g > V_{th}\$

At \$V_g = V_{th}\$ there are just enough electrons "pulled" from the P-type substrate the make a neutral region in the silicon just below the oxide. All holes have "caught" an electron so there aren't any free electrons so there can be no channel.

When \$V_g > V_{th}\$ there will be "extra" electrons which cannot be "trapped" by a hole because all holes already have an electron. These extra electrons are free to move around and they form a conductive channel.

regarding 2: Indeed there does not need to be a source and/or drain for the channel to exist, it is a property of a MOS structure by itself.

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Hence a depletion region is formed because the holes in the p-substrate are depleted by the negative charge created at the Gate oxide interface (not sure about this). Here there are electrons created but they are immobile because they have recombined with the holes in the p-substrate.

No. See later. The ionized acceptors are those which cannot move.

Now, when we increase the Gate voltage equal to Threshold voltage (Vth), still more electrons are created beneath the oxide which cannot have no holes to recombine since there is a depletion region barrier (created by step 1) to reach the next hole. Therefore these electrons are mobile at the interface between the substrate and the oxide. This is a layer of mobile electrons - forming an Inversion layer.

Yes, electrons are generated, but see later.

Applying a positive potential at the Gate terminal creates free electrons at the interface between the substrate and oxide.

It's a very simplyfied way too look at this. By the way, the potential must be positive with respect to bulk.

The inversion layer is created only due to M-O-S- structure (no influence of source or drain regions).

In a MOS capacitor yes, as there are no n++ regions. Electrons are created due to the non-zero electron-hole pairs generation rate (which is a very slow phenomenon). In a nMOSFETs, the source will inject the electrons. That's why MOSFETs can run at many GHz.

How does it work

First let's consider an nMOS capacitor. Which is not the same of a nMOSFET, mentioned in the title (which also has a fundamental difference: the n++ diffusions).

When you apply a "small" positive gate voltage with respect to bulk, ("small" so that the surface potential \$\phi_s<\phi_f\$), holes are swept away from the interface by the electric field, leaving some of the acceptors ionized (i.e. negatively charged). Such ions cannot move, therefore the charge is "fixed". \$Q_B\$ will grow with increasing the gate-to-bulk voltage.

When \$\phi_s=\phi_f\$, the ions alone cannot balance the required amount of negative charge, dictated by the Fermi-Dirac distribution. Therfore electrons will start accumulating near the interface.

Where do such electrons come from?

In fact, one might say: not only the semiconductor is p-type (electrons cannot be injected by the power supply into the bulk), but also there is a depletion region.

Well, in a semiconductor at equilibrium, recombination and generation of hole-electron pairs both occur with equal rate. If there is a perturbation, one of the two mechanisms will prevail, until the equilibrium is reached again. That's where your electrons come from. The holes will be swept away by the field.

By the way, this generation process will be very slow, and that's why the effect of inversion layer cannot be seen by "high" (tens of Hz) frequency C-V measurements.

Further increase of the gate voltage will induce a further increase of \$\phi_s\$, with more an more electrons being accumulated (the depletion region still grows). Until \$\phi_s<2\cdot \phi_f\$, the electron density is smaller than the dopant density and "they can be neglected". Convetionally, we stop "neglecting" the mobile electrons when their density is equal to the dopant density. We call that point inversion (your step 2).

For even higher gate voltages, the electron density will increase much faster (exponentially) with respect the depletion region. Therefore we can assume that the depletion region stops growing, and the charge linearly depends on \$V_{GB}-V_{TH}\$.

Instead, in an nMOSFET, the electrons of the inversion layer are quickly injected by the n++ source (please note that in a planar symmetric MOSFET the source is distinguished by the drain just by its potential). This is why nMOSFETs are very fast.

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  • \$\begingroup\$ Thanks for the Answer and the details. Its very helpful. \$\endgroup\$ – sundar Sep 24 '17 at 21:07
  • \$\begingroup\$ Actually I discovered after reading Semiconductor physics that the inversion charges (mobile electrons) come from the Source actually. Not from where you have mentioned. Thats why we need a gate source overlap intrinsically. Its in page 107 in High Speed Electronics Book by Professor Schumacher. \$\endgroup\$ – sundar Mar 14 '18 at 22:01
  • \$\begingroup\$ In an nMOSFET yes, as I wrote at the end of the answer: "Instead, in an nMOSFET, the electrons of the inversion layer are quickly injected by the n++ source ". In a n-MOS capacitor (gate/SiO2/p-type Silicon, i.e. the structure of your figure), instead, there is no source, and in this case, the electrons are generated in the way described in my answer. \$\endgroup\$ – next-hack Mar 16 '18 at 4:42

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