# Understanding time-response of photodiode circuit (LTspice)

I'm trying to get an idea of the time response of a laser-gate I'm building; so, I wanted to do some basic simulations in LTspice based on this thread:

Attached below is my circuit and voltage response at the oscilloscope.

I'm confused because I figured the time response was going to be on the order of RC, ~10 ms for the given scope impedance and filtering cap, whereas this simulation seems to suggest it's only a few microseconds.

Is my understanding of the time response wrong? Or am I doing this simulation incorrectly? Thank you.

Your 'filtering' capacitor and scope impedance form a high pass filter which 'differentiates' the square wave to produce a spike on each edge that decays exponentially. However with a time constant of 10ms the effect on a 1us pulse is unnoticeable.

What you are seeing is a low pass filter with a time constant of ~1.7us, caused by the internal Base-Collector capacitance of the phototransistor interacting with the load impedance. The rising edge is fast because the photo current is high enough to discharge this parasitic capacitor quickly, but when the current stops the capacitor can only recharge slowly through R1.

A time constant of 1.7us implies a capacitance of 1.7us/100k = 17pF. LTspice's model of the 4N25 has this:-

.model NP NPN(Bf=610 Vaf=140 Ikf=15m Rc=1 Cjc=19p Cje=7p Cjs=7p C2=1e-15)

Cjc is the Base-Collector zero-bias depletion capacitance, which at 19pF is close to the value I calculated by 'eyeballing' the graph.

• Thank you for the reply. Am I using the optical coupler correctly as a photodiode in my schematic? I seem to get wildly different responses depending on how I drive it (load resistance, current source, voltage source, etc).
– Ben
Commented Sep 28, 2017 at 17:04
• Yes, you are using it correctly. The 'wildly' different results are probably due to 'wildly' different inputs. Try varying one parameter at a time to see what effect it has. Commented Sep 28, 2017 at 23:58
• @BruceAbbott Is there a more intuituve way to understand your statement : "The rising edge is fast because the photo current is high enough to discharge this parasitic capacitor quickly, but when the current stops the capacitor can only recharge slowly through R1." ? Shouldn't the R1 also be the cause for a slow discharge of the Cbc parasitic cap? What should be the case so that this capacitor discarges slowly?
– Geo
Commented Dec 12, 2020 at 1:18
• @George The supply voltage is negative, but I still say that the transistor is discharging its Cbc and the resistor is charging it. If you always call going negative 'discharging' and going positive 'charging' then you are correct, however usually a capacitor is considered 'discharged' when it has 0V across it - and any movement away from that (positive or negative) is 'charging' it. So the graph makes it look like the capacitor is discharging slowly, but it is really charging slowly to a negative voltage. Commented Dec 12, 2020 at 2:51

Looks like I'm doing a bit of both wrong.

The bypass capacitor doesn't really matter because:

$$\left ( \frac{1}{\rm 100pF} + \frac{1}{\rm 10nF}\right) \approx {\rm 100pF}$$

With 100pF being the capacitance of the diode (selected arbitrarily). So the time response would then be ~ 10us (with load resistance being R1 and the o-scope in parallel).

Base on the other comments in the linked thread, this is probably a better way to simulate it.