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I have a sub-module in a design that has it's own regulator, i want to use its enable pin driven by an MCU output to also toggle some other IC, say 10ms after the EN has transitioned.

I know i can just use two digital pins, but is there a way using an rc circuit or capacitor to do this in hardware?

Of course the alternative is to use a supervisor, but it'll be unnecessary if there's a cheaper way.

Update: The IC that needs to be enabled with some lag is active-low, and the purpose of the lag is to wait until the output of the regulator is at a stable Vcc.

One of these would be the most correct way, but the enable pin is coming from an MCU with its own brown out detector so some generous lag (not a time critical system) should suffice.

Edit 2: this is the IC.

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  • \$\begingroup\$ A one shot would do the trick. Something like the 74xx121/2/3 might work. \$\endgroup\$ – Peter Smith Sep 30 '17 at 16:44
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    \$\begingroup\$ If Threshold is Vcc/2 +/-25% over temp and RC=T at 63% you can choose 15ms=RC adding a load of series 15k and 1uF shunt ... good for 33% accuracy or so \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Sep 30 '17 at 16:45
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    \$\begingroup\$ Though using a free GPIO pin you already have is pretty cheap. \$\endgroup\$ – sstobbe Sep 30 '17 at 16:53
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    \$\begingroup\$ "The IC that needs to be enabled with some lag is active-low...I've added an update as I seem to have missed out some information." - important information is still missing. What is the second IC? \$\endgroup\$ – Bruce Abbott Sep 30 '17 at 19:12
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    \$\begingroup\$ This sounds a bit like an XY problem. What's the circuit, and what problem are you running into? \$\endgroup\$ – Polynomial Sep 30 '17 at 19:37
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The DIR9001's /RST line is a Schmitt-trigger input with nominal 51kΩ pullup. Therefore a reliable reset delay should be obtainable by simply wiring a capacitor to Ground.

To control it from your MCU you either need an Open Drain output, or a diode to isolate the capacitor from the high output (which will also isolate it from anything else the MCU might be driving).

schematic

simulate this circuit – Schematic created using CircuitLab

When the MCU output is low it holds the capacitor voltage down to ~0.5V (voltage drop across the silicon diode). When the output goes high it allows the capacitor to charge exponentially through the pullup resistor. Reset will be removed when it reaches 2.0V.

The formula for the required capacitance is:- $$C = - \frac{t}{R \times ln(\frac{V_s-V_c}{V_s})} $$

where \$V_s\$ is the supply voltage and \$V_c\$ is the capacitor voltage at time \$t\$. Since the diode produces an offset of ~0.5V the effective charging voltages are 3.3 - 0.5 = 2.8V and 2.0 - 0.5 = 1.5V. Plugging those numbers into the formula we get C1 = ~260nF.

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  • \$\begingroup\$ Thank you for your answer and patience. Looking at section 8.3.2 on page 12, realising I can get away with a smaller capacitor if I calculate for a smaller time, since a minimum of 100ns is required after reset' has reached 2.7V. And I'm thinking a Schottky diode might give a little more room/tolerance between the reset voltage and the effective charging voltage. Would my calculations for C at 12nF be right with: V_drop = 0.25V t = 1ms V_s = 3.25V (reset removed at voltage 2.7V) so effective charging voltages = 3V and 2.45V \$\endgroup\$ – Orbitronics Oct 1 '17 at 12:25
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    \$\begingroup\$ Effective charging voltages with 0.25V Schottky diode would be 3.0-0.25=3.05V and 2-0.25=1.75V (Schmitt trigger voltage is fixed at 2.0V so Vs-Vc is still 3.3-2.0=1.3V). Theoretical capacitance for 1ms is 23nF. \$\endgroup\$ – Bruce Abbott Oct 1 '17 at 16:50
  • \$\begingroup\$ Ah, the value for the schmitt trigger threw me then, still no problem. I've used this design in my PCB, thanks :) \$\endgroup\$ – Orbitronics Oct 1 '17 at 19:13

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