So I have been successfully able to interface a Sandisk SD Card with Spartan 3 FPGA (using verilog). The card after power up initializes correctly and is able to read and write data sector wise correctly. The only problem that remains is that after power up if I press the reset button the card hangs and stops working. I have also not been able to find out what a hard reset means for the SD card. Should it get reinitialized somehow? What command should I send to the card for that? Any help is appreciated.
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\$\begingroup\$ SPI or native interface ? \$\endgroup\$– GrabulCommented Oct 1, 2017 at 16:24
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\$\begingroup\$ Should have mentioned..it is SPI interface. \$\endgroup\$– CandyCommented Oct 2, 2017 at 5:37
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2 Answers
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You will have to simulate your Verilog code or use analyzer to see things going on in live system.
In my opinion, there're only two circumstances when SD-card appears "hung":
bad specification implementation, when card does not understand what is going on, or is unable to understand that previous command must be cancelled. However card must anyway tell you something other than all 1 during execution of these commands - for example during multiple block read there's CRC transmitted, which will contain zeroes, during multiple block write host must transmit CRC otherwise card responses with error, which will also contain 0s. Your task here is to check set of SD-card commands your controller uses, and adjust initialization sequence (number of spare clock cycle before you proceed to CMD0) accordingly;
your FPGA state machine fails after you press reset. For example, clock stops working at the SD-card clock input pin, MOSI gets stuck etc. This is most suspect for hung cards, because SD-card will output nothing if clock does not toggle, or there's no activation of CS and no useful information on MOSI line.
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Once a SD card is powered and initialized but then you reset your FPGA, the code will likely start new initialization of already initialized card. The SD interface does't have any special reset line. The only hard reset in SD is power-on-reset, so the best way to bring a SD card into pre-initialized state is to cycle its power.
answered Oct 1, 2017 at 18:09
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\$\begingroup\$ So speaking purely in terms of Verilog coding, what should I put in the
if(!reset)portion of my code? And if the reset button is pressed what state should my designed FSM go to? Idle or CMD0? \$\endgroup\$– CandyCommented Oct 2, 2017 at 5:44 -
\$\begingroup\$ @Candy, since after reset your FPGA likely erases all SD configuration/capacity etc. information, you need to start new fresh initialization, I guess CMD0+CS asserted (to get into SPI mode), then CMD8, CMD58, etc. in accord with initialization protocol. \$\endgroup\$ Commented Oct 2, 2017 at 6:46
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\$\begingroup\$ I tried the CMD0+CS asserted sequence, but still the SD Card is hung up if the reset is pressed. I am thinking to somehow get the reset and the power line of the SD Card connected so that it triggers the initial power cycle! \$\endgroup\$– CandyCommented Oct 2, 2017 at 7:40
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\$\begingroup\$ @Candy, I don't know how do you do SD initialization in Verilog. The protocol is awfully complex, it has so many conditions/responses to analyze. Usually a sizable MCU with hundreds and hundreds lines of C++ code is required to do this job. Which version of SD specs are you implementing? 2? 3? 4? 5+? \$\endgroup\$ Commented Oct 2, 2017 at 10:05
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\$\begingroup\$ Yes it is complex but somehow I managed to make a customized Verilog code for it. The card is SDHC ver 2. \$\endgroup\$– CandyCommented Oct 2, 2017 at 19:32