It looks as though you haven't received a direct answer to your questions. There are a number of question/answer cases on this site to examine. But I'll just drirectly answer, instead.
Can I assume that saturation on this graph occurs when the DC current
gain starts dropping, or below the knee of each line? For example, at
200 mA with a VCE of 10V, is this transistor saturated since the
current gain is dropping?
That chart has nothing at all to do with saturation. It's actually a good chart you picked to help me make this point, because they include some curves for three different values of \$V_{CE}\$ (must be a PNP device): \$-1.0\:\textrm{V}\$, \$-2.0\:\textrm{V}\$, and \$-10.0\:\textrm{V}\$.
What is important to note that in all three cases here, is the magnitude of all of these values: \$\mid V_{CE}\mid\quad\ge\: 1.0\:\textrm{V}\$. This means, by definition, that the transistor is not in saturation.
If it isn't clear to you why this is, then please think very closely about this. Suppose you have a forward-biased \$V_{BE}\$ junction. But also suppose that the \$V_{BC}\$ junction is not forward-biased. (So that there is little to no current due to it being forward-biased.) Then it must be the case that the collector is further away from the emitter than the base is, right? Has to be. By itself, this says that \$\mid V_{CE}\mid\quad\ge\: 0.7\:\textrm{V}\$. And this is what is meant when someone says that a BJT is in its active region and not in saturation. Saturation just starts right at the moment when \$\mid\: V_{CE}\mid\:\lt\: \mid V_{BE}\:\mid\$ and therefore the \$V_{BC}\$ junction is moving into forward-biased mode. The saturation starts out very shallow, because the forward biased BC junction only adds very, very tiny currents. When still very shallow, the value of \$\beta\$ isn't badly impaired. But as the collector gets closer and closer to the emitter, these currents rapidly increase and the transistor is soon into deep saturation where the \$\beta\$ is quite poor.
So, the curve you show is everything about active mode and nothing at all about saturation. All of the curves are everywhere just active mode curves. The decline that you see taking place is happening for other reasons (current crowding, for example), but not because of saturation. Also, you'll notice that the \$\beta\$ is declining "sooner" when the magnitude of \$V_{CE}\$ is smaller. (This can be a reason why you want to operate a BJT with more \$V_{CE}\$, than less. But that's another story for later.)
If #1 is true, how is it possible that the transistor is in saturation
with a VCE that is greater than 1 V? I thought since in saturation,
both diodes are forward biased, so that the emitter-collector junction
has a relatively low voltage drop (below 0.7V). Am I missing something
here in how I am interpreting this graph?
Well, now you know your answer here.
Because saturation is a matter of "designer choice" and not so much a matter of the device itself (though, yes, the device does impact that choice), the datasheet folks will usually provide a couple of different graphs.
This one can be used to work out the value of \$V_{BE}\$ when saturated, for example. Note that they include curves where \$\frac{I_C}{I_B}=10\$:
That's a big clue about what they consider to be a possible saturation value for \$\beta\$ (10.)
Also, you can see still more detail here:
Where they provide nice curves that show saturation "occurring." This curve actually shows you a lot more useful information about the saturation process for the BJT, at a few of the useful collector current cases. You can extract some representative saturation \$\beta\$ values by looking over these curves.
