What are pros and cons using Wiznet W5100 or Microchip EncX24J600?

It's a bit complicated to explain.

My question is about the performance of Microchip TCP stack vs Wiznet TCP/IP core on the chip. Also about the costs ($$).

For example: With Wiznet, the microcontroller will have less processing, thereby freeing the microcontroller to do other tasks. But I think that this will depend of which layer you are working.

With Microchip TCP stack maybe I have limitations on the peripherals that I can control. Maybe I'll have to use a second microcontroller.

So, I hope I've explained better now for you to help me in the best choice.

  • \$\begingroup\$ I was getting ready to research solutions to do something like this. Thank you for asking. \$\endgroup\$ – Kortuk Jul 7 '10 at 22:19
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    \$\begingroup\$ Any special reasons for the ENCX24J600? The ENC28J60 is much more popular. \$\endgroup\$ – Kevin Vermeer Oct 1 '10 at 14:09
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    \$\begingroup\$ @reemrevnivek I need to communicate at 100 Mbps. \$\endgroup\$ – Daniel Grillo Oct 1 '10 at 14:20
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    \$\begingroup\$ The W5100 is linked with an unidirectional speed link, with a very inefficient protocol (it sends an 16-bit adress with every data byte iirc). So you got like (SPI link) /3 as effective half duplex maximum speed. See also my full answer below \$\endgroup\$ – Marco van de Voort May 3 '17 at 20:19

The W5100 has a TCP/IP core on the chip. With the Microchip ENC devices the user has to implement a TCP/IP stack themselves, on the MCU that is interfaced to it. This is quite easy with a suitable PIC, as free TCP/IP stacks are available from Microchip.

The W5100 has the advantage that it can be used with virtually any MCU, but a fairly powerful device is needed to run a TCP/IP stack if an ENC chip is used.

Of course, another option is to use an MCU with a built-in MAC and PHY. Microchip makes some nice ones, and there are ARM variants with them as well.

  • \$\begingroup\$ That is the extent of my knowledge. \$\endgroup\$ – Kortuk Jul 7 '10 at 22:41

The company I work for uses the PIC18F97J60. It's an 8-bit microprocessor with a built-in MAC and PHY that is very similar to the ENC24J60. If you are planning on using a PIC microprocessor then you can use the Microchip TCP/IP stack. This stack provides everything right up to the application layer. If you are using a non-Microchip processor I think you can only use the ENC24J60 drivers. That said it looks like the Wiznet integrates the transport layers into the hardware not just the MAC and PHY. However they leave it to the developer to implement the application layers like Telnet, FTP, and HTTP.

  • \$\begingroup\$ One thing to note, the PIC18F97J60 only seems to be guaranteed for 100 flash write cycles, so may be a problem to develop for. ww1.microchip.com/downloads/en/DeviceDoc/39762e.pdf (pg 429) \$\endgroup\$ – Toby Jaffey Oct 1 '10 at 15:01
  • \$\begingroup\$ The minimum number of write cycles is 100. Typical is 1k. I've never had a problem. \$\endgroup\$ – mjh2007 Oct 1 '10 at 15:07
  • \$\begingroup\$ That figure will likely be over the whole temp range, so endurance at normal temps is unlikely to be an issue. \$\endgroup\$ – mikeselectricstuff Dec 11 '10 at 15:32

You might want to consider other chips too.

What is a good microcontroller for Ethernet applications?

  • \$\begingroup\$ I just got these two options. \$\endgroup\$ – Daniel Grillo Oct 1 '10 at 13:52

I know it is old, but I happen to have done this with a dspice last year, so I'll summarize for other people's benefit.

First, I wouldn't use the W5100, but its brother W5500, which is basically a revision, and utilizes the SPI much better. I also would consider switching to a part that has DMA, specially if you want to make it UDP only.

In both cases you probably will use the Microchip MLA TCP/IP stack, Wiznet provides patches for this.

Unfortunately, all Microchip TCP/IP stack variants seems to do blocking communication over SPI (no DMA, no enhanced buffer mode). I tried to cut it down to UDP only and clipped the entire microchip part (using the wiznet underlying driver directly and rewriting it in the process).

I also agree with MJH that the DMA enabled PIC18F97J60 is a better choice than a cheaper PIC with ENC (unless you numbers are really high), but I was somewhat disappointed that the TCP/IP does not really utilize the benefits of the J60, sticking to the lowest common denominator.

The advantages of using a IP part instead of an ethernet part is that you can limit a socket to a certain port, and you won't have to transfer any unrelated traffic over your SPI link. The W5500 has 4KB per socket, and I use a separate sockets for receiving and sending to maximize buffer utilization.

My current UDP stack reacts only on the wiznet interrupt, and does not download payload data it doesn't need. I use it UDP, packet based though (no streams), and use broadcasts on ports for send (to avoid having to cache MAC data for ARP purposes, though in retrospect that is maybe not the best opimization).

On the 60MIPS dspice a roundtrip (receive a small packet, answer with a small packet) takes about 100-120us, of which about 10-12us is CPU time in three different chunks (pre receive(3-5us), post receive and presend(5-7 us depending) and post send (2us). Once every 2kb I have to do some maintenance that is about 40us wall time and 5us CPU time.

Short commands are done using enhanced buffer. Longer are done using DMA using (on dspice, DMA needs 2 bits of time between bytes (or words in 16-bit mode), enhanced buffer does not).

The suite is not (yet) open, but if sb needs pointers please respond in the comments. I plan to port the stack to pic32(mk) in the coming year.


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