# Looking for the logical equation from this PMOS circuit

I am looking for the logical equation that describes the given circuit below.

Unfortunately I don't have information whether $U_b$ is positive or negative - would that make a difference?

I derived my current result from a truth table I created.

$f(a,b,c)=\bar{a}*\bar{bc}$

I think, my logical term might be right, but I would like to know whether this would also be possible by just looking at the circuit and identifying NAND and NOR constellations in PMOS there.

• Do you think parallel is OR and series is AND? and obviously polarity of Vcc matters. – Tony Stewart EE75 Oct 8 '17 at 16:10
• I learned that parallel PMOS is NAND and series is NOR, but using that I can't come to senseful results. Is it possible to derive the Vcc polarity from 'the arrows of the transistors'? – tristndev Oct 8 '17 at 16:15
• Nobody uses Pch FETs like this with -Vdd ( but may exist) and Parallel is OR inverting so NOR. It is just an academic question. – Tony Stewart EE75 Oct 8 '17 at 16:20
• Negative Vdd was only used for ECL. and not CMOS or even Pch FETs so this question is kind of useless. – Tony Stewart EE75 Oct 8 '17 at 16:30
• This is not really helping, I don't even know what you're talking about. This was one of the exercises that was chosen in a previous exam and I have issues solving it. That's it. – tristndev Oct 8 '17 at 16:45

Since you have connected gate of the PMOS to $U_b$, this voltage should be negative for the current to flow.
This happens for: $$f = a + bc$$