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I need to design a 3 bit comparator using only multiplexers specifically 74ls153 and/or 74ls151. I've already constructed the truth table(see below) and realized that A=B is not needed since its inferred when both A > B & A < B are equal. My thought process has me using three 74ls153's to compare pairs of bits starting with the LSB and working my way up to MSB. One "side" of the mux is wired to output A>B and the other "side" wired for B>A.

I am
a) unsure how to carry these outputs to the next multiplexer / final multiplexer
b) how to convert this to a 2-bit output


I'm not looking for an outright answer, more so a point in the right direction with a better understanding.

enter image description here

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    \$\begingroup\$ Hint: First design a 1-bit comparator and then figure out how to combine 3 of them to make a 3-bit comparator. \$\endgroup\$ – The Photon Oct 9 '17 at 5:31
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    \$\begingroup\$ You are definitely on the right track. Second hint: If the MSBs are not equal, it doesn't matter what the rest of the bits are. If the MSBs are equal, then you need to consider the LSBs. Recurse as needed. \$\endgroup\$ – Dave Tweed Oct 9 '17 at 12:18
  • \$\begingroup\$ I've set up the three mux's to compare bit pairs, they give an output of 00 for A=b 01 for A>B and 10 for A<B. How do I recurse the problem though? should I pass those outputs from the MSB mux to the selectors in the next MSB mix, since the the selectors are for the next available bit pair or vice versa? \$\endgroup\$ – moose0306 Oct 9 '17 at 15:51
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    \$\begingroup\$ I recommend you "map" the functions that a mux performs, to the functions a 3bit comparator needs to perform. You have to start with the MSB (A2, B2). If they are equal, then you need to "test" (A1, B1). If they are equal, then you "test" (A0, B0). If they are equal, then all bits are equal, otherwise - they are not! \$\endgroup\$ – Guill Oct 12 '17 at 23:10
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I believe it is simpler to use the 74ls151. This is an 8 to 1 mux. You have 8 inputs that you can select one at a time. So if you apply the 3 A bits to the select pins, the (single) output will "follow" the corresponding (D0 to D7) input level. Since the bits are equal when they are all 0 or 1, this means that the output will follow D0 (000) or D7 (111). These inputs (D0, D7) are tied HI, and the others tied low. This way, when the bits are 000 or 111, the output will be HI. The same is done with the B bits.

I leave it up to you, how to use the third mux, to provide a HI output when outputs of the other two mux are equal.

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