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Why all books told that Av differential of an differential input stage in power amp is very big? Ad = Rc/re, but if there are current sources in the emitter and collector circuit they will have too big impedance and division one big "Rc" to another big "re" will not give very big "Ad" value. Where is a trick?

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  • \$\begingroup\$ Can you post a schematic? I can't imagine what the circuit you have in mind looks like. \$\endgroup\$ – dirac16 Oct 9 '17 at 10:15
  • \$\begingroup\$ Add a schematic of what you mean. Yes even if it is a trivial circuit. I see no current sources so there aren't any. \$\endgroup\$ – Bimpelrekkie Oct 9 '17 at 10:16
  • \$\begingroup\$ Zout of Emitter Follower of Zin/hFE becomes load of other side. \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Oct 9 '17 at 10:17
  • \$\begingroup\$ Zin/hFE - may you show that on pic.? \$\endgroup\$ – MaxMil Oct 9 '17 at 10:24
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In the differential stage with asymmetric output, the load current can "swing" from:

\$0A\$ to \$I_{EE}\$

enter image description here

And the gain is

$$A_d = 0.5*R_C \approx \frac{R_C}{2r_e}$$

But by adding the current mirror we can "increase" the gain (the gain is now the same as it is for a symmetrical output). Because now the load current can swing from:

\$-I_{EE}\$ to \$+I_{EE}\$

enter image description here

And the gain is:

$$A_d = gm*R_L \approx \frac{R_L}{r_e}$$

In your audio amplifier the dif. stage the load resistance is equal to the input impedance of a VAS stage (Q6). Hence, the DC gain is "low" because \$r_\pi\$ is low and the Miller capacitance. http://www.ecircuitcenter.com/Circuits_Audio_Amp/Miller_Integrator/Miller_Integrator.htm

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  • \$\begingroup\$ Can I increase the input resistance of VAS stage (Q6) using for example current source if the emitter of Q6? \$\endgroup\$ – MaxMil Oct 10 '17 at 7:18
  • \$\begingroup\$ How does T5 and T6 current mirror affect the input resistance of differential stage (between point A and ground)? \$\endgroup\$ – MaxMil Oct 10 '17 at 7:36
  • \$\begingroup\$ May I use the following equation for input resistance of my amplifier between point A and ground: Rin = 2*(betta+1)*re? \$\endgroup\$ – MaxMil Oct 10 '17 at 13:21
  • \$\begingroup\$ But why you want to increase the VAS stage input resistance? The diff. stage input resistance is (beta+1)*2re. And the current source (T5) at the tail of a diff amp. does not affect the Rin. \$\endgroup\$ – G36 Oct 10 '17 at 16:12
  • \$\begingroup\$ I think that increase resistance of Q6 stage will inrease the Av of input differential stage or it isn't so? \$\endgroup\$ – MaxMil Oct 10 '17 at 16:19
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Why all books told that Av differential of an differential input stage in power amp is very big?

I find "all books" a dangerous statement. It really depends on the input stage if it has a large voltage gain (Av). Also you're talking about Power amplifiers for audio, you should have mentioned that because audio is low frequency. There are also Power Amplifiers for high frequency applications. Many tricks we can do in audio cannot be done at these high frequencies.

In the schematic you show the first stage by itself actually does not have a large voltage gain! The voltage gain is roughly equal to the gm of the input pair transistors times the load at the collector.

Here that load is Q12 and Q19 which make a current mirror. It means the (differential) currents from Q1 and Q2 are added and this current ends up the collector of Q12. This collector is loaded by the base of Q6 which is a diode to ground and this is a low impedance. Note that the signal is still a current. If you would calculate the actual voltage gain up until the collector of Q12, that gain would be quite low.

The AC signal current appearing at the collector of Q12 will go into Q6 and will then be multiplied by beta, flow through the string of diodes.

At these diodes the signal is turned into a voltage again and current amplified (buffered) to the output.

Do note that this design has negative feedback using C2, R3 and R10. This feedback sets the total gain of the amplifier. For this to work properly the open-loop gain of the amplifier needs to be high enough. That's why we want high-gain stages.

As you can see, this design is not so easy, it is not actually only the first stage that determines the gain. This circuit is basically a voltage-to-current converter - current amplifier -- active load -- current buffer with overall feedback.

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  • \$\begingroup\$ Tell, when I build any circuit like this need I always do full small-signal analysis of that circuit to find equation for example for Av or I can estimate that value and use appropriate schematic that will give Av within suitable limitations? \$\endgroup\$ – MaxMil Oct 10 '17 at 8:56
  • \$\begingroup\$ Yes you need the full small-signal diagram and analysis of the circuit. With experience you recognize certain circuits and you will "see" the small signal behavior more easily without explicitly drawing it on paper. I'm experienced so I can do the latter. You're learning so you have to do the first. \$\endgroup\$ – Bimpelrekkie Oct 10 '17 at 9:04
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You have mentioned the expression Ad = Rc/re.

Please note that this expression is (1) a very rough approximation for a common emitter amplifier with heavy negative feedback (due to re) and (2) does not apply for a diff. amplifier. Neither for a simple one (two or three transistors only) nor for the one shown by you.

This is because the resistance in the common emitter path (as seen from the left transistor of the diff. pair) is bypassed by the low-resistive input of the most right transistors emitter.

For a good understanding of the various gain expressions (common mode, single diff. mode, full diff. mode) you must know the working principle of the diff. pair.


Detailed derivation (for the diff. stage Q1, Q2, Q3 only).

Assumption: Unsymm. differential operation with Vin1=Vin and Vin2=0 [Q1 can be treated as an emitter follower loaded by the input resistance of Q2 in common base configuration].

Gain: Ad=Gain1*Gain2=A1*A2 with

A1=gm1*ro/(1+gm1*ro) with ro=re||(1/gm2).

If the dynamic resistance re is very large (re>>1/gm2) we can set ro=1/gm2.

A1=(gm1/gm2)/(1+gm1/gm2).

For identical operational points for Q1 and Q2 we have: gm1=gm2=gm and the gain is

A1=1/2.

Hence, with A2=gm*Rc (Rc=collector resistance) the total gain is

Ad=0.5*gm*Rc .

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  • \$\begingroup\$ I disagree. The asymmetrical voltage gain with current mirror as an active plus the external load resistance is gm*Rc \$\endgroup\$ – G36 Oct 9 '17 at 15:24
  • \$\begingroup\$ If you disagree, you should identify an error in my calculation. Do you? Where is the error? \$\endgroup\$ – LvW Oct 9 '17 at 16:08
  • \$\begingroup\$ OK, I see you don't include the current mirror in your derivation. So, everything is correct. \$\endgroup\$ – G36 Oct 9 '17 at 16:13
  • \$\begingroup\$ Yes - however, in case of a current mirror the formula does not apply because one must ask: What is Rc? There is no Rc and we need another transistor for processing the current difference of the first diff. stage. \$\endgroup\$ – LvW Oct 9 '17 at 16:16
  • \$\begingroup\$ @LvW How the A1=gm1*ro/(1+gm1*ro) was derived? I can't understand that. \$\endgroup\$ – MaxMil Oct 23 '17 at 19:36

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