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How to bias this differential circuit correctly ?

Additional Information:

Vdd = 3.3V and This differential circuit is connected in negative feedback manner to a CMOS inverter.

Note: this is not homework question. I am a self-learner and whatever useful replies I get will be used to debug https://github.com/promach/frequency_trap

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Edit for clarification It seems like I have a similar differential amplifier as in Figure 4.54(a) below:

Why does the first term of A1 ends up as Ad while the second term ends up as Acm ?

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Is the following test circuit the right way to measure open-loop gain of my Gm2 circuit block ? note: now I have asymmetrical input rather than symmtrical differential pair

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1 Answer 1

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Bias thusly

schematic

simulate this circuit – Schematic created using CircuitLab

which will FAIL because your opamp is non-inverting.

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  • \$\begingroup\$ will FAIL because my opamp is non-inverting. ???? \$\endgroup\$
    – kevin
    Oct 11, 2017 at 14:03

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