How big a threat is electrostatic discharge ESD to typical integrated circuits, really?


I am not especially looking for opinions (indeed, uninformed opinions on this topic are easy to find), but for quantifiable or quasiquantifiable experience of the actual destruction of hardware. (For example, if you work in an electronics assembly plant and are familiar with the quantity of hardware that gets thrown in the plant's trash bin due to ESD events, then you have legitimate, quasiquantifiable experience; but if you have merely read the plethora of service manuals that warn against ESD, then you might have no more than an opinion.)


I ask because (a) I hold a master's degree in electrical engineering, (b) the focus of my master's study was in electromagnetics, (c) I do not however work professionally in the fields of electromagnetics or electronics, (d) I have not always been very careful while disassembling electronics at home, and (e) except due to lightning, I have never once witnessed the destruction of electronics by ESD. I have repeatedly, unfortunately witnessed the destruction of electronics by inadvertent connection under power to wrong impedances, but never by ESD.

I am 49 years old and, perhaps like you, have been disassembling electronics at home since I was 13. I am not always careless (it depends on the value of the electronics I am handling, how much time I have, etc.) and I do own an ESD wrist strap, but I have been careless enough without apparent consequence for so many years that I begin to notice that my own experience seems to contradict the conventional warnings. What's going on?

Some of the warnings recently say that ESD "degrades" electronics. But does it, really? Quantifiably, how much?

Also, I ask because I instruct engineering courses part-time at a state college, the E.E. undergraduates there all have FPGA prototype boards, and some of the undergraduates just toss the boards in their backpacks. I have yet to hear one of these undergraduates mourning the loss of his or her FPGA to ESD—though, admittedly, I have not myself taught any of the courses in which the FPGAs are used.


So, is there any quantifiable or quasiquantifiable experience of this? Or is ESD not quantifiably much of a threat, despite all the (suspiciously bossy, suspiciously nondetailed) warnings the service manuals convey?

See also this answer.

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    \$\begingroup\$ Just something to check your assumptions: how do you know that you "have never once witnessed the destruction of electronics by ESD"? You've never had something just mysteriously die "for no reason"? ESD is often not obvious. \$\endgroup\$ – brhans Oct 15 '17 at 13:27
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    \$\begingroup\$ Working in the computer engineering field for 40 years, I certainly heard of electronic devices which were presumed to have been damaged by ESD, though I have never personally witnessed it. \$\endgroup\$ – Hot Licks Oct 15 '17 at 14:23
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    \$\begingroup\$ I've too have never seen anything in real life catastrophically damaged by ESD. \$\endgroup\$ – dandavis Oct 15 '17 at 14:24
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    \$\begingroup\$ One problem with ESD failures is that there might not be immediate catastrophic damage. It is possible that a device only fails after some time. \$\endgroup\$ – Bimpelrekkie Oct 15 '17 at 15:01
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    \$\begingroup\$ Industries that cannot tolerate failure implement strict ESD and handling procedures. A component cannot fail on a 1 Billion dollar satellite, so your risk needs to be near zero or at zero. A 1 dollar toy from china doesn't need ESD procedures, it is expendable \$\endgroup\$ – Voltage Spike Oct 17 '17 at 21:04

ESD is one of those issues where it is difficult to prove it really is the cause of failure on many occasions; rarely will a device be sent back to a manufacturer for an in-depth failure analysis.

That said, I have seen ESD failures, mainly in dry situations; as the breakdown voltage of air reduces with humidity, a given strike will have a lower chance of damaging a device, and this is the reason that 40% relative humidity is recommended as a mitigating step for manufacturing / rework to minimise ESD issues.

The biggest issue is that ESD can cause latent failures due to a part being damaged during manufacture, but not badly enough to fail testing. There can be, however, enough damage to cause early life failure.

I have seen many returned units where the only logical conclusion was ESD damage at some point.

Another issue is feature sizes; when I started doing electronics for money (1970) the feature sizes could withstand most ESD events; we had no special lab equipment at the time as I recall.

With current feature sizes at least 100 times smaller than the early 90s, the possibility of ESD damage increases dramatically.

Even ESD protection diodes are not really very strong; a few mA is usually enough to destroy them but the failure is often an open circuit and undetectable; the device is now at a higher risk of damage.

In short, ESD can and does cause device failure, but with all the variables involved we can only take precautions based on the possibility of device failure.

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  • \$\begingroup\$ "I have seen many returned units where the only logical conclusion was ESD damage at some point." Interesting. Yes, that is the sort of experience I had asked to hear about. Very well: ESD damage would be a substantial problem, after all. \$\endgroup\$ – thb Oct 15 '17 at 17:26
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    \$\begingroup\$ Glad to be if help. Experience counts :) \$\endgroup\$ – Peter Smith Oct 15 '17 at 18:18
  • \$\begingroup\$ "the possibility of ESD damage increases dramatically" aka "you can get a lot of volts/metre across a micron". \$\endgroup\$ – Brian Drummond Oct 15 '17 at 20:23

I'm your age and am working (though only recently) in the field of electronics design. However I believe I can't give you what you call a quasiquantifiable experience rather than sharing some observations and reasoning.

As per my experience I, too, never witnessed electronics devices damaged by ESD. However...

  • this doesn't necessarily mean ESD protection is overrated. Fact is most electronics components and devices are built with ESD protection in mind. They can resist to ESD to a certain level, which means it could just be that the average level of ESD in daily life is well taken care of.

  • ESD causing some form of wearing out is conceivable, i.e. high voltages in repeated strikes might very well and progressively cause permanent damages in the long run -- similarly, flushing too much current through a diode destroys it, right? However one would have to analyse the silicon layers of decap'ed chips under a microscope. I have no idea whether that has been done.

  • Quantifying ESD is tedious because there are so many circumstances in which "things" rub against each other and build charges let alone how many materials, humidity conditions... The industry can only provide well-controlled testing environment that at least match observed and known live conditions.

As for your students, who seem to have yet to observe any damages made to their boards, caution tells that's no reason enough to suspect nothing happened -- there might be lurking damages, still, but they're not observed if they occurred to unused parts of their hardware or if their boards are slowly degrading, for instance. In this case only time will tell.

By the answer you linked to it is obvious humidity plays a huge role in reducing the accumulated charges, for instance. Common sense is to at least use ESD protection while carrying bare electronics devices. If damages don't seem to be observable caution rules, still.

As for the damages of ESD, I like this video demonstration of a youtuber called Kevin Darrah. He manages hard to destroy an ATmega328 by simply rubbing his feet against the carpet and touching a pin of the chip. But the chip ends up destroyed. It's interesting how damages seem to accumulate to a point the chip is definitely terminated.

EDIT: In another video, he also manages to destroy N-channel MOSFET transistors doing the same exercise. He also demonstrates a basic protection and tries it.

That, IMHO, is enough to treat ESD seriously. Maybe do some experiments with your students?

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    \$\begingroup\$ "He manages hard to destroy an ATmega328 by simply rubbing his feet against the carpet and touching a pin of the chip." - It's worth noting that the 328 has ESD-protection diodes built-in. It took Kevin some work to kill the 328, but that doesn't mean it'll take as much work for other parts. Many discretes, in particular, have no protection. \$\endgroup\$ – marcelm Oct 15 '17 at 14:28

That is an interesting question...

Some grad student may have done some statistical analysis to determine the actual failure rates of devices due to static discharge, though I doubt those numbers are accurate. Analysing why a device failed is seldom done except in circumstances where a particular device fails often enough to make it warranted the study, either by the assembler, or the devices manufacturer. Also, in reality, a high number of device failures are chalked up to ESD, simply because no other reason can be found. If you have studied component life, you will know about the bath-tub curve. It is pretty much impossible to tell when a device just wont work whether it was ESD or just a weak part. You would need to open it up and look at it under a microscope for ESD damage. Even if you saw some, you could never be sure when or where it was actually damaged.

However, that is not the point. It's about cost.

We know that ESD can and will kill semiconductors.

the quantity of hardware that gets thrown in the plant's trash bin due to ESD

In reality, very few boards are trashed during assembly. Instead, attempts are made to debug and repair them. This adds a significant cost to the entire assembly process.

Further parts can be damaged but not enough to fail till after they are shipped. Field replacement is extremely costly, both in dollars, and in reputation.

In order to minimize those costs it is prudent to do whatever we can up front to ensure that as few boards as possible end up in the debug section. That includes ensuring all parts are handled appropriately during the assembly process. That of course includes minimizing the possibility of damage due to ESD.

The investments required to properly handle ESD are quite large, however, they are generally a one time cost which, when aggregated over years of assembly, give a significant return on investment.

That ultimately means, it really does not matter how frequent the failures would have been, one is too many.

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    \$\begingroup\$ There was a very old article on "Semiconductor Reliability News" on 1993 (sadly I can't find it anymore), that stated that 60% of the total failures were due to ESD. Just by googling you might find that this figure is now (depending on the source) between 25% and two thirds... \$\endgroup\$ – next-hack Oct 15 '17 at 13:17
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    \$\begingroup\$ @next-hack yes but like all stats it depends on the source and how the data is collected so I take those values lightly. Especially if the data is from the part manufacturer who would rather blame the end user rather than imply his early-life-mortality figures are higher than touted. \$\endgroup\$ – Trevor_G Oct 15 '17 at 13:19
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    \$\begingroup\$ @next-hack However, the relative numbers are. less than half as many failures since implementing stricter ESD handling is very indicative. \$\endgroup\$ – Trevor_G Oct 15 '17 at 13:21

I've done the theoretical training to become an avionics maintenance engineer, and while I don't have much practical experience, I can say this:

It's a big enough threat that airlines take the risk that it might cause a plane to fall out of the sky seriously. I'm not sure if there's been any actual safety incidents that have been blamed on ESD, but the airlines and aviation regulators aren't taking the risk.

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    \$\begingroup\$ There are actually. I will see if the specifics are in the public domain otherwise I can't go much further \$\endgroup\$ – JonRB Oct 15 '17 at 14:17

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