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Given the following schema (I'm using isis proteus)

Follower

Vin's amplitude is higher than the max and min supply voltages (+/-10V), which gives this graph:

simulation

(Blue: Vin, Yellow: Vout)

When Vin is greater than +Vcc, Vout goes to +Vsat, which is expected; When Vin is lower than -Vcc, Vout goes to +Vsat: Shouldn't it stay in -Vsat??

I tried it in real life and it gives the same result. Why?

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It's a behavior called phase reversal. It exist on many but not all opamps.

Basically it works like this: If your input signal exceeds the allowed input voltage range some of the internal transistors in the opamp break down. They shouldn't pass current but you're driving them so hard that they turn on.

The output then flips to the other polarity. Depending on the circuit around the opamp this could even lead to a so called latch-up condition where the output stays at the wrong polarity forever.

In general you should never exceed the allowed input range of opamps. If the phase reversal occurs due to an internal transistor breakdown the transistor may take damage and changes it's characteristics. The OpAmp may seem fine afterwards but it is not guaranteed to work within it's specification anymore.

About OpAmps that may latch-up: Never use them for critical control systems. Think about a heater with temperature control. It senses the temperature and controls a heating element. If your OpAmp is one of those latch-up types it is very possible that at extreme temperatures it runs into latch-up, turns on the heater at full power, stays there forever and burns you house down.

The data-sheet of the OpAmp usually states if it has phase-reversal or if it can latch-up. If this is not mentioned in the data-sheet assume that it does.

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The TL081 is a JFET input device and is susceptible to output phase reversal.

Under proper operating conditions (which means not exceeding the common mode range or exceeding the absolute maximum ratings) the input transistors are operating the gate in reverse bias (as is normal for a JFET).

Exceeding the negative common mode range forward biases the gate to channel junction and ultimately causes output phase reversal.

See this application note for a very detailed explanation.

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You exceed it's input range. Give it +-15V or reduce your input waveform

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  • \$\begingroup\$ I've purposefully used an input that goes higher and lower than the supply voltages, I expected it to stay in -Vsat when Vin is very negative, but it went the other way to +Vsat, my question is why? \$\endgroup\$ – ielyamani Oct 19 '17 at 7:09
  • \$\begingroup\$ Indeed, see the datasheet, bottom of page 5: Common-mode Voltage: Vcc- + 4 V to Vcc+ - 4 V This means with a +/-10 V supply you should only apply input voltages between -6 V and +6V. You're exceeding that. Then you cannot expect the opamp to behave properly anymore. If this is not OK: use an opamp with rail-to-rail input voltage range. \$\endgroup\$ – Bimpelrekkie Oct 19 '17 at 7:12
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    \$\begingroup\$ Why this happens is difficult to answer. It is a "feature" of this opamp's design. Only if you have a proper transistor level schematic of this opamp including proper transistor and JFET models and a suitable simulator can you do a simulation for this and really see what happens. But that's pretty pointless, it will not bring you anything. \$\endgroup\$ – Bimpelrekkie Oct 19 '17 at 7:15

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