To directly answer the question, there is nothing in what a CPLD is to prevent you using VHDL to build circuits for one.
CPLDs in essence are basically the same as an FPGA with the exception that they are non-volatile. That is their logic configuration will remain even after powering it off. By contrast FPGAs are volatile (typically SRAM based) and so forget their configuration when turned off leading to the need for extra hardware to configure them at power on.
CPLDs are great then for applications which require instant-on - no configuration time at all. However the down side to being non-volatile is they are generally smaller in terms of gates and so have less functionality. This is because non-volatile memories are typically larger space wise than SRAM.
Another down side to CPLDs is, as with all non-volatile memories, the number of erase/program cycles is limited. Many CPLDs can be reconfigured only a few thousand times at most (and many have lower endurance). FPGAs on the other hand being SRAM based can be reprogrammed pretty much indefinitely.
That brings me on to answering the question as to whether CPLDs are good for learning and development. Yes they can be quite cheap, which is good, however the endurance can also cause you problems. As a general development kit you may find yourself easily passing the endurance life of the CPLD from frequent reprogramming.
However as a final point, the comparison is somewhat a moot point. MAX 10 series of devices are actually SRAM based FPGAs. The MAX family (e.g. II and V) were indeed CPLD type devices, however the 10 series deviates from this trend.
To keep the ability for near instant on, the MAX 10 devices do have internal flash memory to store configuration bit streams allowing for rapid reconfiguration without an external configuration device. This flash will have an endurance lifespan, but you don't need to use it. Like its bigger cousins, being FPGA based you can simply program the SRAM of the MAX 10 directly via JTAG without the need for using the Flash.