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Im using AD9742 (Analog Device) for building a high speed digital-to-analog convertor (DAC). I will use FPGA digital I/O ports as inputs to the DAC. As I can found in the data sheet, the example layout could be found and shown in the figure below.

  1. I can understand the R1-R9 are the pull-down resistors to make the inputs at GND level in case there are no inputs (floating).

  2. I can't figure out what are the purposes for using RP3 and RP4 (22-ohm) in series between DB0X-DB13X to DB0-DB13 before DAC inputs.

I have searched other kinds of DAC data sheet (ex. TI DAC902, DEM-DAC90xU/E) and they all have similar design. Does anyone know why we need the RP3 and RP4?

Thanks in advance.

Best.

DAC layout example from datasheet

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    \$\begingroup\$ I can think of a couple of reasons, but I'm experienced enough to back this up, and can't find find anything in the datasheet, so I'll just make this a comment. One is that the inputs have clamp diodes to proctect against too high or negative voltages on the inputs. The 22 ohm resistors allow the diodes to clamp to the rail without burning out. The other thing is that the chip can operate at over 200 MHz. The 22ohm resistors help keep the flanks from being too sharp and causing interference. \$\endgroup\$ – JRE Oct 20 '17 at 19:03
  • \$\begingroup\$ @JRE I would agree. Especially because this appears to be a disconnectable evaluation board design that's bound to be abused by us users. It's a good idea to have current limiting resistors on the DIO lines. \$\endgroup\$ – Chris Knudsen Oct 20 '17 at 19:11
  • \$\begingroup\$ Too late to edit. That should have been "not experienced enough." \$\endgroup\$ – JRE Oct 20 '17 at 19:15
  • \$\begingroup\$ In with @JRE I had to do that extensively on video cards I designed to slow signal rise and fall times to limit the harmonics and reduce the EMI that would couple into, and be very visible on, the video image. It makes quite the difference. \$\endgroup\$ – Trevor_G Oct 20 '17 at 19:55
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    \$\begingroup\$ @Trevor: You want to make that an answer? You have experience to back up the things I can only speculate about. \$\endgroup\$ – JRE Oct 20 '17 at 19:57
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More than likely there to reduce EMI.

I had to do that extensively on video cards I designed to slow signal rise and fall times to limit the harmonics and reduce the EMI that would couple into, and be very visible on, the video image.

Generally speaking, whatever is driving a digital line has a much faster edge than the thing receiving it needs. This is because the driver is designed to be capable of driving many gates. As such, you can have quite a bit of room to slow down the edges. This is especially true of synchronous bus transactions that have well defined setup and hold delays.

The resistor, along with the capacitance of the trace beyond it, act as a low pass filter.

It makes quite the difference.

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  • \$\begingroup\$ What's odd is that this is a DAC, so the digital lines are inputs, not outputs. There's still a bit of filtering relative to the input capacitance. But normally you'd want a series termination near the driver, not the receiver, on a digital line. \$\endgroup\$ – The Photon Oct 20 '17 at 20:41
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    \$\begingroup\$ @ThePhoton not always. If a drive is driving a bus with an unknown number of connections you can't know the capacitance in advance. That aside though, I am guessing in this case they want to limit the amount of incoming bus noise that ends up coupled into the DAC output. Something you would want as quiet as possible. \$\endgroup\$ – Trevor_G Oct 20 '17 at 20:45
  • \$\begingroup\$ Thanks for sharing your precious experience. As your comment, the series resistors together with trace capacitance works as low-pass filter to avoid fast-changing and sharp edge inputs. I guess the 22-ohm value should be a trial and error value since the trace capacitance is not predictable and I can buy even smaller and larger ohm value. The 22-ohm might be the balance value to have low-pass filtering function and not lower the voltage level too much (because it is a small ohm value). Is that correct? \$\endgroup\$ – ccmkn Oct 21 '17 at 3:49
  • \$\begingroup\$ @ccmkn usually the value is chosen during development. The capacitance is much better defined if you have CMOS parts too. Yes the resistor will not change the ultimate voltage level for CMOS inputs if the source is low impedance. Different story for TTL though. \$\endgroup\$ – Trevor_G Oct 21 '17 at 13:10
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The resistor networks provide termination/biasing to insure clean edges and avoid ringing.

The schematic you reference is for demo boards, which are being fed from ribbon cables.

The data sheet covers both the part and the demo board.

From: AD9742 Datasheet

The digital inputs are designed to be driven from various word generators, with the on-board option to add a resistor network for proper load termination.

It is a bit vague, but to get 210 MSPS over a ribbon cable would require proper termination. So they do talk about termination in the datasheet.

But the Digital Input section on page 14 does not talk about any termination.

As you state, the datasheet for the TI:DEM-DAC90xU/E Evaluation Fixture has a similar and more extensive termination and pull-up and pull-down with the 22Ω possibly being replaced by capacitors for ac-coupling. On p3, TI states:

In any case, the applied digital input signal must be properly terminated to insure clean edges and avoid ringing.

The DEM-DAC90xU/E supports the DAC902. But if you examine the DAC902 Datasheet Digital Inputs, there is no mention of any termination, biasing, etc.

All digital inputs are CMOS compatible.

is about as far as they go. Nothing else.

For the money, I'd talk to an Application Engineer, but I think the answer is pretty obvious.

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  • \$\begingroup\$ Thanks for the detail sharing. Looks like the resistors are working as low-pass filter as @Trevor 's comment to avoid sharp digital signals. I will try to add this resistors in my layout to see if there is any better. Thanks! \$\endgroup\$ – ccmkn Oct 21 '17 at 4:05
  • \$\begingroup\$ Why? Neither datasheet deals with it. \$\endgroup\$ – StainlessSteelRat Oct 21 '17 at 4:09
  • \$\begingroup\$ I am quite confused... According to the explanation so far, the resistors are required (to form the low-pass filter) to have the more smooth edge for digital inputs in real board design (on both demo board design). That should independent of what kind of connectors I am using, ribbon cables or directly connected to FPGA DIOs. Do I misunderstand something?... \$\endgroup\$ – ccmkn Oct 21 '17 at 5:22
  • \$\begingroup\$ Use of a ribbon cable means wires act as a transmission line AND require termination to work. Neither datasheet talks about them, so as long as DAC is close to your FPGA, you are adding more complexity than you need. Up to you, but I shouldn't. \$\endgroup\$ – StainlessSteelRat Oct 21 '17 at 13:17
  • \$\begingroup\$ @ccmkn Stainless has a point too. Resistors are often added for "impedance balancing" on long cables. You would have to look at the output section of whatever is driving the cable to see if they terminate that end the same way. Either way though, it reduces the edge times. \$\endgroup\$ – Trevor_G Oct 21 '17 at 13:18

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